Novice instruction
–Principle of equality which circuit wafer designs with PROTEL the DXP
The circuit wafer design’s principle of equality includes: The circuit wafer selects, the circuit wafer size, the part layout, the wiring, to weld the plate, the packing, the jumper wire and so on.
The circuit wafer with spreads the copper laminated wood to make generally, the flag selects when must from aspects and so on electrical specification, reliable, processing technological requirement and economic indicator considered. Commonly used spreads the copper laminated wood is spreads the copper phenol aldehyde paper laminated wood, to spread the copper epoxy paper laminated wood, to spread the copper epoxy glass cloth laminated wood, to spread the copper epoxy phenol aldehyde glass cloth laminated wood, to spread the copper teflon glass cloth laminated wood and multilayer printed-circuit board uses the epoxy glass cloth and so on. The different material’s laminated wood has the different characteristic. The epoxy resin and the copper foil have the extremely good cohesive force, therefore the copper foil adhesive strength and the operating temperature are high, may in 260℃ the melt tin does not bubble. The epoxy resin has soaked the glass cloth laminated wood is been small the humidity influence. The ultra-high frequency circuit wafer should better spreads the copper teflon glass cloth laminated wood.
On request being flame-resistant electronic installation, but also needs to be flame-resistant the circuit wafer, these circuit wafers have plunged the being flame-resistant resin laminated wood. Circuit wafer thickness should act according to the circuit wafer the function, to install part’s weight, the circuit wafer plug’s specification, the circuit wafer external dimensions and the withstanding mechanical load and so on decided.
Is mainly should guarantee the enough rigidity and the intensity.
Common circuit wafer’s thickness has 0.5mm, 1.0mm, 1.5mm, 2.0mm
From the cost, the copper membrane line length, anti-noise ability considered that the circuit wafer size is smaller is better, but the board size is too small, then radiates bad, and the neighboring wire easy to cause the disturbance. The circuit wafer manufacture expense is and the circuit wafer area is related, the area is bigger, the construction cost is higher. When the design has cabinet’s circuit wafer, the circuit wafer size also receives the engine case outer covering size the limit, certainly must before determining the circuit wafer size the definite cabinet size, otherwise is unable to determine the circuit wafer the size. In the ordinary circumstances, in forbids the wiring scope which in the wiring level assigns is the circuit wafer size size. The circuit wafer optimum shape is the rectangle, the length and breadth compared to is the 3:2 or the 4:3, when the circuit wafer size is bigger than 200mm×150mm, should consider the circuit wafer the mechanical strength. In brief, should the overall evaluation advantages determine the circuit wafer the size.
Although Protel DXP can the automatic layout, but in fact the circuit wafer layout nearly is completes manually. When must carry on the layout, generally follows the following rule:
1. the special part’s layout special part’s layout considered from the following several aspects:
1) high frequency part: Between the high frequency part’s segment is shorter is better, tries to reduce the segment the distributed parameter and the electromagnetic interference, the part which disturbs cannot leave too easily near. Subordinates in inputs and subordinates between the output part’s distance should as far as possible big somewhat.
2) has the high potential difference part: Should enlarge has between the high potential difference part and the segment distance, in order to avoid presents time the accident short circuit damages the part. In order to avoid crawling the electricity phenomenon occurrence, generally requests between the 2000V potential difference the copper membrane line distance to be bigger than 2mm, if regarding a higher potential difference, is away from should also enlarge. Has the high voltage component, should arrange as far as possible when the debugging the hand is not easy the place which touches.
3) weight too big part: This kind of part should have the support to be fixed, but regarding greatly is also heavy, calorific capacity many parts, is not suitable installs on the circuit wafer.
4) gives off heat with the thermal element: The attention heating element should be far away from the thermal element.
5) may adjust part: Regarding the potentiometer, the adjustable inductance coil, the variable capacitance, the micro-active switch/micromove switch/sensitive switch and so on adjustable part’s layout should consider the complete machine the structure request, if within the aircraft adjusts, should place the place which on the circuit wafer easy to adjust, if the outside the aircraft adjustment, its position must correspond with adjusting knob’s on engine case kneading board position.
6) circuit wafer installment hole and support hole: Should reserve the circuit wafer the installment hole and support’s installment hole, because nearby these Kong Hekong cannot the wiring.
2. defers to the electric circuit function layout, if does not have special request, defers to the schematic diagram the part arrangement to carry on the layout as far as possible to the part, the signal enters from the left side, outputs from right side, inputs from above, outputs from under. According to the electric circuit flow, arranges each function circuit unit the position, makes the signal circulation even more to be smooth and to maintain the direction is consistent. Take each function electric circuit as the core, carries on the layout regarding this core electric circuit, the part arrangement should even, be neat, be compact, the principle is reduces and reduces between each part’s lead wire and the connection. The digital circuit part should separate the layout with the analogous circuit part.
3. the part should lay aside to circuit wafer edge’s distance all parts in leaves in board edge 3mm the position, or is apart from the circuit wafer edge the distance to be equal to the thickness of slab at least, this is because carries on the assembly line plug-in unit when the production in enormous quantities and carries on the wave ridge welds, must provide to the guide rail trough use, simultaneously is also prevents, because the contour processing causes the circuit wafer edge breakage, causes the copper membrane line break to cause the waste product. If on the circuit wafer the part are excessively many, has to when must surpass 3mm, may in the circuit wafer edge add on 3mm auxiliary side, on operates V shape trough nearby auxiliary, when production breaks off with the hand.
4. the part lays aside the order first lays aside and the structure close coordination stationary position part, like power point., indicating lamp, switch and connection plug-in unit and so on. Again laying aside special part, for example heating element, transformer, integrated circuit and so on. Finally laying aside small part, for example resistance, electric capacity, diode and so on.
The wiring rule is as follows:
1) the line is long: The copper membrane line should be as far as possible short, in the high-frequency circuit should so. The copper membrane line the turning point should not for the fillet or the drift angle, but the right angle or the acute angle will affect the electrical specification in the high-frequency circuit and in the wiring density high situation. When double kneading board wiring, both sides wire should the mutually perpendicular, oblique or walks the line curving, avoids mutually parallel, reduces the parasitic capacity.
2) line width: The copper membrane line’s width should take be able to satisfy the electrical specification to request and to be advantageous for the production as a criterion, its minimum value is decided in winds through its electric current, but is not suitable is smaller than 0.2mm generally. So long as the board area is big enough, the copper membrane line width and the spacing are best choose 0.3mm. In the ordinary circumstances, the 1~1.5mm line width, the permission winds through 2The electric current. For example the grounding and the power line should better select are bigger than 1mm the line width. When the integrated circuit place welds between the plate walks two lines, welds the plate diameter is 50mil, the line width and the line spacing is 10mil, when welds between the plate walks a line, welds the plate diameter is 64mil, the line width and the line spacing is 12mil. Between attention metric system and British system transformation, 100mil=2.54mm.
3) line spacing: Between the neighboring copper membrane line’s spacing should satisfy the electrical safety requirements, simultaneously for ease of the production, the spacing should wider be better. The smallest spacing can withstand at least adds the voltage the peak value. In the wiring density low situation, the spacing should big as far as possible.
4) shields and the earth: The copper membrane line’s public grounding should place the circuit wafer as far as possible the edge part. Should many retain the copper foil on the circuit wafer to make the grounding as far as possible, like this may cause the shield ability enhancement. Moreover the grounding shape is best makes the ring circuit or the grid shape. Because the multi-layered circuit wafer uses the inner layer to make the power source and the grounding special-purpose level, thus may have the better shielding effect effect.
Welds the plate
Welds the plate ruler soldering and sealing plate’s in hole size to from aspects and so on component lead diameter and common difference size as well as tin-plating level thickness, hole tolerance, hole metallization galvanizing thickness considered that usually in the situation adds on the 0.2mm achievement by the metal pin diameter to weld plate’s in hole diameter. For example, the resistance metal pin diameter is 0.5mm, then welds the plate hole diameter is 0.7mm, but welds the plate outer diameter to weld the plate aperture to add 1.2mm, smallest should to weld the plate aperture to add 1.0mm. When welds the plate diameter is 1.5mm, to increase welds plate’s anti-racking strength, may use the square shape to weld the plate. Is smaller than regarding the hole diameter 0.4mm welds the plate, welds the plate outer diameter/to weld plate hole diameter =0.5~3. Is bigger than 2mm regarding the hole diameter to weld the plate, welds the plate outer diameter/to weld plate hole diameter =1.5~2.
Commonly used welds plate size as shown in Table 1-1 Table 16-1
| Commonly used welds the plate size Welds plate hole diameter /mm |
0.4 0.5 0.6 0.8 1.0 1.2 1.6 2.0 |
| Welds plate outer diameter /mm | 1.5 1.5 2.0 2.0 2.5 3.0 3.5 4 |
Matters needing attention:
The design welds time plate’s matters needing attention to be as follows:
1) welds the plate hole edge to be bigger than 1mm to the circuit wafer edge distance, like this may avoid when the processing causes to weld the plate damage.
2) welds the plate to make up the waterdrop, when and welds the plate to connect the copper membrane line which is thin, must weld the plate and between the copper membrane line connection designs the waterdrop shape, like this may cause to weld the plate to strip not easily, but the copper membrane line with welds between plate’s segment not to be easy to separate.
3) neighboring welds the plate to avoid having the acute angle.
The big area fills
On the circuit wafer big area fills the goal has two, one is the radiation, another is with the shield reduction disturbance, to avoid time the welding produces the heat causes the gas there is no place emissions which the circuit wafer produces to cause the copper membrane to fall off, should, in the big area fills on openes a window, the latter causes the packing for the grid shape. The use spreads the copper also to be possible to achieve the antijamming the goal, moreover spreads the copper to be possible to circle the over weld plate automatically and may connect the grounding.
Jumper wire
In one-sided circuit wafer design, when some copper membrane is unable the connection, the procedure usually is uses the jumper wire, the jumper wire length should choose the following several kinds: 6mm, 8mm and 10mm.
Earth
on 1 grounding’s altogether impedance disturbance circuit diagram’s grounding expression electric circuit’s zero electric potential, and serves as in the electric circuit the other each spot common reference point, in the actual electric circuit as a result of the grounding (copper membrane line) the impedance existence, definitely will bring altogether the impedance disturbance, therefore in wiring time, cannot have the grounding mark spot to connect casually, this possibly will cause together the harmful coupling to interfere with electric circuit’s normal work.
2. how to connect the grounding usually in an electronic system, the grounding divides into systematically, the cabinet (shield), the digit (logic) and the simulation and so on several kinds, when connects the grounding should pay attention to the following several points:
1) the correct choice single-point earth with accepts after checking much. In the low-frequency channel, the signaling frequency is smaller than 1MHz, between the wiring and part’s inductance may neglect, but in the grounding electric circuit resistance produces the pressure drop is big to the electric circuit influence, therefore should use the single-point earth law. When the signal frequency is bigger than 10MHz, the grounding inductance’s influence is big, therefore uses suitably nearby earths accepts after checking the law. When signaling frequency when 1~10MHz, if uses the single-point earth law, the grounding length should not surpass the wave length 1/20, otherwise should use accepts after checking.
2) the digit and the simulation separate. On the circuit wafer both has the digital circuit, and has the analogous circuit, should cause them to be as far as possible separated, moreover the grounding cannot mix meets, should (best power source end also distinguish connection) separately with power source’s grounding end connection. Must enlarge linear circuit’s area as far as possible. Generally digital circuit’s antijamming ability, the TTL electric circuit’s noise margin is the 0.4~0.6V, CMOS digital circuit’s noise margin for supply voltage 0.3~0.45 time, but analogous circuit part, so long as has the microvolt level noise, sufficiently causes its work not to be normal. Therefore two kind of electric circuits should separate the layout and the wiring.
3) overstrikees as far as possible the grounding. If the grounding is very thin, the earth electric potential will change along with the electric current change, causes the electronic system’s signal to receive the disturbance, specially analogous circuit part, therefore the grounding should extend as far as possible, generally take will be bigger than 3mm as suitable.
4) will meet the grounding constitution closed loop. When on circuit wafer when digital circuit, should cause the grounding to form the ring circuit, like this may sharpen the antijamming ability obviously, this is, when because on the circuit wafer has many integrated circuits, if the grounding is very thin, will cause the big differential earth potentials, but the ring-like grounding may reduce the earth resistance, will thus reduce the differential earth potentials.
5) should approach as far as possible with the first-level electric circuit’s ground point, and this level electric circuit’s power source filter electric capacity should also meet on this level ground point.
6) total grounding connection. The total grounding must strictly according to high frequency, intermediate frequency, the low frequency in turn first-level level from the weak electricity to the strong electric interlock. The high-frequency unit should better use the big area surrounding type grounding, guaranteed that has the good shield effect.
Antijamming
Has microprocessor’s electronic system, the antijamming and the electromagnetic compatibility designs the question which in the process must consider, is specially high regarding the clock rate, bus cycle quick system; Includes the high efficiency, the big electric current driving circuit’s system; Including weak simulated signal as well as high accuracy A/D transfer network’s system. In order to increase the system anti-electromagnetic interference ability to consider that takes the following measure:
1) selects the clock rate low microprocessor. So long as the controller performance can satisfy the request, the clock rate is lower is better, the low clock may the effective noise reduction and sharpens system’s antijamming ability. Because in the square-wave contains each kind of frequency component, its high-frequency component is very easy to become the noise source, in the ordinary circumstances, the clock rate 3 time of high frequency noises are most have riskily.
2) reduces in the signaling the distortion. When high speed signal (signaling frequency high = rise along with drop along quick signal) when copper membrane on-line transmission, as a result of the copper membrane line inductance and electric capacity’s influence, will cause the signal to have the distortion, when the distortion will be oversized, will cause the system work not to be unreliable. Generally the request, the signal the copper membrane line which transmits on the circuit wafer is shorter is better, crosses the hole number to be less is better. Typical value: The length does not surpass 25cm, crosses Kong Shu not to surpass 2.
3) reduces the cross-talk interference between the signal. When a holding wire has the signal impulse, will have the high input impedance weak holding wire to another to have the disturbance, by now needed to carry on the isolation to the weak holding wire, the method is adds an earth the contour line to surround the weak signal, or increases the space distance, may use regarding the different stratification plane’s between disturbance increases the power source and the grounding stratification plane method solution.
4) reduces from power source’s noise. The power source while provides the energy to the system, also adds to its noise in the system which supplies power, in system’s replacement, the interrupt as well as other control signal are easiest the ambient noise disturbance, therefore, should increase the electric capacity to filter out these suitably from power source’s noise.
5) pays attention to the circuit wafer and primary device’s high-frequency response. In the high frequency situation, on the circuit wafer copper membrane line, welds the plate, the hole, the resistance, the electric capacity, the connector distributed inductance and the electric capacity does not allow to neglect. Because these distributed inductance and electric capacity’s influence, when copper membrane line length for signal or noise wave length 1/20, will have the antenna effect, will have the electromagnetic interference to the interior, foreign launch electromagnetic wave. In the ordinary circumstances, crosses Kong Hehan the plate to be able to produce the 0.6pF electric capacity, an integrated circuit’s seal can produce the 2~6pF electric capacity, a circuit wafer’s connector will have the 520mH inductance, but a DIP-24 plug will have the 18nH inductance, these electric capacities and inductance to low clock rate electric circuit not any influence, but must give the attention regarding the high clock rate’s electric circuit.
6) the part arrangement wants the reasonable district. Part the position which arranges on the circuit wafer needs to consider the anti-electromagnetic interference question fully. One of principles is between each part’s copper membrane line must short as far as possible, in the layout, must the analogous circuit, the digital circuit and produces the big noise electric circuit (relay, big current breaker and so on) to separate reasonably, causes their signal coupling to be smallest.
7) processes the grounding. The single-point earth which mentioned according to front or accepts after checking the way to process the grounding much. Will simulate, the digit, the high efficiency component to separate the connection, gathers again power source’s ground point. Outside the circuit wafer lead wire must use the shielded wire, regarding high frequency and the digital signal, the shielded cable both sides must earth, the low frequency simulated signal uses the shielded wire, uses the single-end earthed generally. Should use the metal screening can the noise and the disturbance very sensitive electric circuit or the high frequency noise specially serious electric circuit to shield.
decoupling electric capacity. The decoupling electric capacity is good by the porcelain piece electric capacity or the multi-layered ceramics electric capacity’s high-frequency response. When designs the circuit wafer, between each integrated circuit’s power source and the grounding must add a decoupling electric capacity. The decoupling electric capacity has two functions, on the one hand is this integrated circuit’s storage capacitor, provides and absorbs this integrated circuit to open the door and to close the instantaneous charging and discharging electrical energy, on the other hand, the bypass falls the high frequency noise which this component produces. In digital circuit typical decoupling electric capacity for 0.1μF, such electric capacity has the 5nH distributed inductance, may have the good decoupling function to the 10MHz following noise. In the ordinary circumstances, chooses 0.01~0.1 μF electric capacity to be possible.
Generally the request 10 piece of about integrated circuits have not increased a 10μF charging and discharging electric capacity. Moreover, in power source end, the circuit wafer four jiao and so on positions should bridge 10~100 μF electric capacities.
High frequency wiring
In order to cause the high frequency circuit wafer the design to be more reasonable, the resistance to interference is better, when carries on the PCB design should consider from the following several aspects:
1) reasonable choice layer. Uses the middle inner layer plane to take the power source and the grounding level, may play the shield the role, reduces the parasitic inductance, the reduction holding wire length, to reduce the cross-talk interference between the signal effectively, in ordinary circumstances, four plywood compared to two plywood noise low 20dB.
2) walks the line way. Walks the line to defer to 45° the angle corner, like this may reduce the high frequency signal the launch and the coupling.
3) walks the line length. Walks the line length to be shorter is better, two line parallel distances are shorter are better.
4) hole quantity. Crosses the hole quantity to be less is better.
5) level wiring direction. The level the wiring direction should take the vertical direction, is the top layer is the horizontal direction, the first floor is the vertical direction, like this may reduce the disturbance between the signal.
6) spreads the copper. Increases the earth to spread the copper to be possible to reduce the disturbance between the signal.
7) package of place. Enters luggage processing to the important holding wire, may obviously enhance this signal antijamming ability, certainly may also enter luggage processing to the noise source, enables it to disturb other signals.
holding wire. The signal walks the line not to be able the ring circuit, needs to defer to the chrysanthemum chain way wiring.
9) decoupling electric capacity. In integrated circuit’s power source end cross-over decoupling electric capacity.
10) high frequency clutches the class. Digit, simulation and so on when connection public groundings must meet the high frequency choke, generally is the center bore puts on has the wire high frequency ferrites magnetism bead.
