LPC2104 Boot and Remap explain in detail (one) - - - (original) - 51rd the Chinese electronic net
August 8, 2008 – 7:26 pmandrewpei publishes in 2005-3-10 17:09 Philips the ARM <- returns page layout
Prologue
Recently in studied ARM in the process, has met some before in 8 machine, in 16 machine applications has not seen the technical expression. And, compared with puzzles two noun terminology which and is troublesome is “Boot” and “Remap”. At the same time, on-line also frequently saw that has the net friend to raise the question on these two technical noun. Is good in now the network is so developed, causes us to be possible very quick to obtain many teachers and the old bird’s explanations. After this period of time’s reading and the practice, were left basically this concept for the principle a clue, here, summarized by own understanding, pasted comes up to BBS, shared with the general net friends, if had the improper act, the board brick held on a minute, because I pasted this article the goal am throw “the brick” to direct “the jade”, was not directs “the brick”! Bow!
Two specialized term - nonvolatile storages and volatility memory
Nonvolatile storage: After referring to the power failure, can still preserve the data effectively in the quite long time the memory. If EEPROM, EPROM, FLASH and so on.
Volatility memory: After referring to the power failure, loses the memory property rapidly the memory. If SRAM, SDRAM and so on.
Reference reading material: 3G time memory all living things (electron design technique in 2005 the 2nd issue)
OK, all readies, Let’s GO!
Introduction
Along with the semiconductor processing technology and the processor design technique’s unceasing enhancement, the embedded processor’s speed is getting quicker and quicker; But nonvolatile storage’s reading speed actually by far cannot follow CPU the development. The traditional monolithic integrated circuit movement pattern - - machine code saves in the nonvolatile storage (for example ROM, FLASH), when movement by CPU directly from takes out the instruction execute - - appears gradually lacks the ability to do what one would like. If continues to continue to use traditional the program run pattern, then high speed CPU will be at the idle waiting status in the overwhelming majority time, this has already wasted the CPU computing power, is also unable to realize the high density data stream real-time processing and the transmission. But within the short-term, the semiconductor industrial world was still unable to realize the low cost non-volatility high speed memory technology. In order to resolve the contradiction which between the above processor and the nonvolatile storage the speed does not match, engineers have quoted the Boot technology and the Remap technology in the embedded system domain. But wants the correct understanding Boot technology and the Remap technology, must establish Memory Map first (memory mapping) concept.
Technical concept description
Memory Map
One of computer most important function units is Memory. Memory is the numerous memory cell set, to cause CPU to find the memory to have some information memory cell accurately, must assign one for these units to distinguish “the ID card” mutually, this “the ID card” was the address code. In the embedded processor, integrated many kinds of type Memory, usually, we said that the identical type Memory is Memory Block. In the ordinary circumstances, the processor designer will assign a value for each Memory Block continuously, the number and its memory cell number equal, by 16 enters the natural number set which the system expressed to take this Memory Block the address code. This kind of natural number set and the Memory Block corresponding relationships, are Memory Map (memory mapping), sometimes also calls Address Map (address mapping). In fact, Address Map is more appropriate in the literal sense.
What needs to stress, Memory Map is a logical concept, is the computer system after (on electricity) repositions only then establishes. Memory Map is equal to this kind of mathematical function: The function input value is the address code, the output by the addressed element in data. After computer system power failure, when or replacement, this mathematical function does not exist, is only left over in the computer system to realize this mathematical function physical foundation - - electric circuit connection. May also think like this: Memory Map is the computer system (on electricity) repositions when the preparation movement, is one address code resources which has CPU to the system in each physical memory block assignment automatic process.
Boot/Bootload
Boot in the computer specialized English’s meaning is “the guidance”, after it is the computer system (on electricity) repositions, the CPU first machine movement. Then, what Boot guidance is what? Briefly speaking, how Boot is guides CPU to load the machine instruction. After the simple the Boot movement is 8 monolithic integrated circuit system resets, takes out the skipping instruction from the replacement vector, shifts to user program code section execution this process.
Usually, in the computer system, after (on electricity) repositions, except carries out the Boot movement, but also with along with a Load process. In ordinary circumstances, this Load from low speed nonvolatile storage “transporting” some data to high speed volatility memory. Boot and Load carry out continuously, form a coherent whole, we call it Bootload. One of most typical examples is the DSP real-time signal processing system, on after the system the electricity, will save in EEPROM the real-time signal processing procedure duplicates in system’s RAM, then CPU reads the machine instruction movement directly from RAM.
Remap
Remap and computer’s exception handling mechanism is close related.
The complete computer system must have the exception handling ability. When exceptionally produces, CPU in the hardware actuates under the mechanism to skip to the storage location which establishes in advance, takes out the corresponding exception handler the entry point address, and enters the exception handler according to this entry point address. This preservation has the exception handler entry point address storage location is usually called “the unusual entrance”, in the monolithic integrated circuit system also calls “the interrupt entrance”. The actual computer system has many kinds of type unusualities, the CPU designers to simplify the chip design, generally all unusual entrances will concentrate put in the nonvolatile storage, and when system electricity maps to a fixed continual address space. Is “exceptionally approaches the meter” located at this address space’s in unusual entrance set.
On after the system the electricity exceptionally is obtains to the meter from the low speed nonvolatile storage mapping. Along with processor speed unceasing enhancement, very natural, the people hoped computer system when exception handling also fully displays CPU handling ability, but nonvolatile storage’s reading speed enables CPU only to gain the exception vector same time by many idle waitings, has like this limited the CPU computing power full display. Especially when the nonvolatile storage bit wide is smaller than the CPU bit wide, this kind of negative influence is more obvious. Therefore, the Remap technology is said that enhances the system to the unusual real-time response ability.
It is not difficult from the Remap this English word’s constitution to see, the revision which before this once more it was to has established the memory which maps. From says essentially, Map and Remap are the same, is the address code resource distribution for the memory block, but the two produce the time is different: The former on the system the electricity time occurrence, is any computer system must; But the latter after system electricity steady operation’s time occurrence, is may elect to the computer system designers. In the typical 8 monolithic integrated circuit system, has not used the Remap technology.
The complete Remap process in fact usually begins in system’s Bootload process. Carries out the movement is specifically: Bootload duplicates nonvolatile storage’s in exception vector the high speed volatility memory block an end, then carries out the Remap order, will be located in the high speed volatility memory exceptionally to map to the gage block exceptionally approaches in the meter address space. Hereafter, system, if produces exceptionally, CPU from will have mapped to exceptionally in the micro meter address space high speed nonvolatile storage reads the exception vector. Makes concrete to the model ARM7 embedded system, will be internal or outside in the piece Flash/ROM exception vector duplicates in the existence unit which by the Bootload procedure in internal SRAM will assign, will then carry out the Remap order again. Is usually equal as a result of the internal SRAM data bit wide with the CPU data bit wide, thus CPU may not have the waiting full speed to plunge into the exception handler, obtains best real-time exceptionally responds.
LPC2000 Boot and Remap analysis
May know from the above technical description, typical Boot, Memory Map and the Remap time sequence should be: Memory Map-> Boot-> Remap. But, in the LPC2000 processor these three movement’s order actually has a point to be different, is in turn Memory Map-> Remap-> Boot-> Remap, last Remap process is the user may elect, may carry out may also not carry out. Whenever after system reset, the LPC2000 processor in order carries out the above four processes, below analyzes these stages. For simplicity, take the main line not open LPC2104 processor as the example.
On LPC2106 piece memory classification
The LPC2104 internal memory type has two kinds: Flash block and SRAM block. And, the part Flash memory block has read in the Bootload procedure and 64 bytes before chip leaving the plant by Philips exceptionally approaches the meter. Discusses for the convenience, we said that this part of Flash block is the Bootload subblock, its size is 8KB. As mentioned above, before processor not on electricity when or replacement, the Flash block and the SRAM block are merely two do not have the address code physical memory, not yet establishes the actual mapping relations with the address code.
Memory Map
After the LPC2104 processor (on electricity) repositions, the Flash block and the SRAM block’s address mapping result is: SRAM occupies the 0×40000000-0×40003FFF scope address code space; Flash occupies the 0×00000000-0×0001FFFF scope address code space. This mapping result is a compound state, only has the extremely short time, the application system development personnel is unable to see this compound state. The processor essence periphery module’s address mapping result is 0xE0000000-0xFFFFFFFF.
Remap
After Memory Map completes, will follow closely LPC2104 to make one time Remap, this Remap operation’s object will be the Bootload subblock, will complete by the processing internal hardware logic execution, not development personnel’s control. After process Remap, Bootload subblock by whole Remap to 0×7FFFE000-0×7FFFFFFF internal high address memory space; At the same time, after original Memory Map, takes 0×00000000-0×0000003F the address space that part of 64 byte size Flash subblock by temporarily the logging out mapping relations, displaces by the Bootload subblock’s in exception vector part.
Hence, the Flash block takes the situation to the memory address space to be as follows:
1st, because except that Remap by outside the logging out mapping relations’ that small part 64 byte Flash subblock, a Flash block achievement whole has been taken temporarily the address code space is 0×00000040-0×0001FFFF;
2nd, at the same time, the Bootload subblock took the 0×7FFFE000-0×7FFFFFF address code space, in the Bootload subblock exceptionally has taken 0×00000000-0×0000003F to the meter part.
Therefore, in the Bootload subblock exceptionally in fact took to the meter part has repeatedly taken three segmented address code space: 0×00000000-0×0000003F, 0×0001E000-0×0001E03F as well as 0×7FFFE000-0×7FFFE03F.
In Figure 2, memory’s mapping order is: Memory Map-> Reset Remap-> Bootload Remap.
SRAM block and essence periphery module mapping relations after Remap maintains invariable, may see also Figure 1.
* - this pastes revises the time finally: 2005-3-10 17:31: 19 modifiers: andrewpei
* - revision reason: Append
Boot
LPC2104 effective exceptionally to the meter address code space was 0×00000000-0×0000003F (strict should be 0×00000000-0×0000001F). After the processor repositions the Boot movement is takes out the skipping instruction from the 0×00000000 place outset character, starts the procedure execution. Because after the processor repositions, maps the 0×00000000-0×0000003F address space exceptionally to stem from the Bootload subblock to the meter, what therefore CPU in fact starts to carry out is Philips the Bootload procedure which reads in before chip leaving the plant.
After entering Bootload, the procedure first inspects the watch-dog overflow to symbolize whether setting.
If watch-dog overflow symbol setting, then indicated that the current system reset will be the internal soft replacement, CPU next step exceptionally will carry on to the Flash block to the meter adds and verifies. If adds with the check result is zero, the Bootload procedure will abolish in the Bootload subblock exceptionally to the meter part in 0×00000000-0×00000003F address space mapping, restores the Flash block exceptionally to meter’s in this 64 byte address space mapping relations (e.g. Figure 3), then skips to exceptionally changes over to the user program to meter address 0×00000000 place the execution. If adds with the verification result is not zero, the Bootload procedure will carry on the UART0 connection the baudrate to detect automatically, momentarily responds the ISP host machine’s programming to request that carries out the processor chip ISP programming work.
If Bootload has not discovered the watch-dog overflow symbol setting, then indicated that the current system reset is exterior the hard replacement, CPU the sampling P0.14 pin external logic level input. If is 0, Bootload carries out the UART0 automatic baudrate detection, momentarily responds the ISP host machine’s programming request; If will be the 1, Bootload following movement will examine the watch-dog overflow symbol setting with front the program execution to be completely same.
Remap (may elect)
Finally this step may elect the Remap movement is in the user completely under the control, the Remap object is the internal SRAM memory block exception vector part, total 64 bytes sizes. The user may program decided after when Remap, Remap, whether to revise again exceptionally as well as how to revise to the meter exceptionally approaches meter and so on. What needs to stress, initiates the Remap movement the instruction with to establish in the SRAM block the exception vector all function code to be completely resident in the Flash block user programming area, is a user application software’s part.
Once had the net friend to introduce the Remap function which to Philips in the LPC2000 series processor this may elect to propose questioned: LPC2000 the series processor internal Flash block is divided two groups, each group has provided mutually the independent 128 bit width read cushion, in the overwhelming majority situation, CPU is full speed carries on from the Flash block’s visit, does not exist has the waiting condition; On the other hand, does not need using the LPC2000 embedded system dynamic to change generally exceptionally approaches the meter. Therefore, carries on Remap after internal SRAM, cannot enhance the processor to the unusual response ability, the practical significance is not big.
In fact, the LPC2000 series processor introduces SRAM the Remap function to have the vital significance regarding the IAP operation. Is opposite says in other based on the ARM7DMI essence processor, the LPC2000 series processor has function - IAP which is characteristic. When IAP cleaning/write operation, on the piece the Flash block, including this on exception vector part, is unable to visit the read, for in IAP cleaning/write operation time responds effectively unusually, must before transferring the IAP cleaning/write operation, the SRAM in exception vector part ahead of time maps the system exceptionally to approach in the meter address space. (to be continued)
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