Monolithic integrated circuit software and hardware union simulation solution
August 8, 2008 – 4:42 pmAuthor Email: goldbull.nease.net
Abstract: This article introduced that one embedded system simulation method, connects through one kind of special design’s set of instructions simulator ISS software debugger software Keil uVision2 and hardware language simulator software Modelsim, has realized the software and hardware’s synchronized simulation.
Key word: BFM, TCL, Verilog, Vhdl, PLI, Modelsim, Keil uVision2, ISS, TFTP, HTTP, hypothesized network card, Sniffer, SMART MEDIA, DMA, MAC, SRAM, CPLD
Shrinks slightly the word to explain:
BFM: Main line functional module. In the HDL hardware language simulation, BFM completes between the abstract description data and the concrete succession signal transformation.
The PLI:Verilog programming language connection, is between the C language module and the Verilog language module exchanges the data the connection definition.
TCL: The wording meaning is the tool command language, is one kind of explanation effective language, the popular EDA software integrates generally has TCL. Uses the TCL user to be possible to compile controls the EDA tool’s script procedure, realizes the tool operation automation.
The ISS:CPU set of instructions simulator, may carry out the CPU machine code.
TFTP: The simple file transfer protocol, Windows tftp.exe is not only this agreement client side realizes.
SMART MEDIA: One kind of memory stick, commonly used in digital camera, MP3.
DMA: Direct memory visit. Uses between the external instrumentation the high speed data shift.
MAC: Media turning on controller. In this article refers to the network card chip.
Foreword
In the traditional embedded system, the design cycle, the hardware and software’s development is carries on separately, and after the hardware completes only then system integration in together, in many situations, after the hardware completes, only then starts to carry on the real-time software and the whole debugging. The software and hardware union simulation is one kind before the physical prototype available, can start the debugging routine technology as soon as possible.
The software and hardware union simulation has the possibility to cause software design engineer to begin in the design early time to debug, but uses traditional the method, project engineer completes until the hardware design can carry on debugs processing. Some softwares may in not have in the hardware support situation to complete the task the code, if does not involve to hardware’s algorithm. Before obtaining the hardware compiles with the hardware interaction’s code, but only then moves after the hardware, can code truly carries on the debugging. Through uses the software and hardware union emulation technique, may start this design debugging process in the design early time. Because software’s development usually completes in the system development’s segmentum posterius, the early start debugging will have the possibility in the design cycle to cause this project ahead of time to complete, this technology will reduce for the first time the hardware and the software connects when together will present the accident to cause the risk which the project extension will complete creates.
Before obtaining the physical prototype, uses the software and hardware union emulation technique carries on the confirmation to between the hardware and software’s connection, will cause you not to spend the too much time in the later period system debugging. When you attain the physical prototype to start truly runs software’s time in above, you will discover that after the test software part the normal work, this will save the project later period’s massive time and diligently.
The software and hardware union simulation system is composed of a hardware execution environment and a software execution environment, usually the software environment and the hardware environment have own debugging with the control interface, the software through a series of the bus cycle which and hardware’s correlation starts by the processor. This article the card development introduces one kind of software and hardware union simulation system by Mini Web.
This plan’s core is uses 51 monolithic integrated circuit simulation engine GoldBull ISS51 (to hereafter refer to as ISS51), ISS51 is a 51 monolithic integrated circuit development environment Keil uVision2 plug-in unit, ISS51 has connects Keil and the hardware simulation environment Modelsim connection, may realize the software and hardware synchronization simulation. In this system, Keil takes the software debugging contact surface, Modelsim takes the hardware simulation and the debugging contact surface, ISS51 is responsible for the software execution, the monitoring software break point, the single step, the memory and the register data returns for Keil, the CPU main line succession produces with the capture, the internal functional module (for example timer, serial port) functions and so on movement.
Mini Web card introduction
Mini the Web card is a movement on monolithic integrated circuit’s Web server, provides the net mouth connection, has the large capacity filing system, provides TFTP and the HTTP service. Although the software system is quite complex, but after optimized translation, carries out code also insufficient 25K, has left behind the enough space for the following promotion.
51CPU uses the SST89 series, this kind of CPU has the ISP function, may through the RS232 serial port, download directly the goal code CPU.
The DMA control logic is a programmable logical component, what uses is ALTERA CPLD EPM240, the major function realizes between the periphery component’s DMA transmission. Because 51CPU carries on the IO visit is the low efficiency, needs 24 clock cycles to be able to carry on a IO visit, shifts the data need more clock cycles between the auxiliary equipment, uses the DMA control logic to be possible to achieve 3 clock cycles to be able to shift a byte. In this system processes many kinds of network protocols, needs massive text receiving and dispatching and the filing system visit, uses DMA to be possible to raise 51 monolithic integrated circuit’s data processing speeds enormously. The DMA channel mainly has between the MAC chip and the RAM block data shift, between SMART MEDIA and the RAM block data shift.
What the network card chip uses is AX88796, the main merit is may with the 51CPU conveniently connection; Supports the 100M ethernet, the speed is high; Has the big receive text buffer, can the smooth network current capacity, reduce text discarding which and the reproduction, because the 51CPU processing speed causes slowly.
SMART MEDIA is a motion memory stick, mainly uses in the storage file, Mini the Web card supports 8M to the 256M SMD card.
The filing system is Mini the Web card new development module, filing system’s test mainly carries on through TFTP, for this reason Mini Web in the card TFTP service routine has carried on the special design, supports formatted SMART MEDIA, the gain surplus space, the gain filename tabulation, the upload, downloading and the delete files.
Software and hardware union simulation necessity:
Mini the Web card software module are many, the software development risk is big. The software the dependence is strong to the hardware, the FLASH memory’s visit actuation, the network card actuate, the DMA actuation, needs the software and hardware coordination debugging.
Filing system’s development, is easier under the simulation environment and quickly. For instance when the simulation ended, might simulation model data replace SMART in the MEDIA to the disk file, when the simulation started, loaded disk file’s in data to SMART in the MEDIA simulation model, when localization filing system’s question, this function was very useful.
Uses the software and hardware union simulation, is advantageous for the system earlier period design. 51 monolithic integrated circuit’s exterior RAM visit efficiencies are low, between the memory copy, the exterior component’s block data shift wastes the time very much. Mass data’s copy operation or the block data verification, the comparison operation realize in CPLD, may improve 51 monolithic integrated circuit processing data greatly ability. Through the software and hardware union simulation, may appraise the CPLD processing data to the performance improvement.
Mini Web card software and hardware union simulation system:
The software and hardware union simulation main solution’s question is the system function design and the confirmation, it does not solve the power source, the filter electric capacity, the main line level compatible question.
Makes the system simulation, must first to the hardware system modelling. What we pay attention is the system design accuracy and the performability.
In system’s serial port is only uses for to support the ISP downloading software, the software part has not made any operation to the serial port, therefore the system simulation may not need to consider.
Network card chip AX88796, the manufacturer has not provided the simulation model. It conforms to the ISA interface standard with the CPU connection, the software to the AX88796 operation is according to the NE2000 standard network card chip design, from this we have established a network card chip simulation model. We designed MAC BFM to come the simulation network card chip the ISA connection, the NE2000 definition register to realize in the C model, MAC BFM and NE2000 register C model through PLI connection exchange data.
The SRAM simulation model is very easy to gain, many component producers provide the Verilog simulation model, but the component producer provides the Verilog simulation model contains the complex timing control code, this will affect the simulation velocity. According to the experience, we may guarantee that SRAM is applied correctly in the veneer design, will not have the succession question, therefore we may use a simplified the SRAM simulation model, this will be we designs, the effective code will have several lines.
51CPU BFM is responsible for the monolithic integrated circuit base pin succession the production and the capture. 51CPU BFM is with the ISS51 close bundle, the installation procedure by ISS51 to provide.
SMART MEDIA is the simulation model which Tristar Corporation provides, we use are also the Tristar Corporation’s same type memory sticks. This model may use in confirming the software to operate SMART MEDIA the accuracy and the DMA Controller connection succession.
DMA Controller is Mini a Web card hardware development part, applies the logical design code in the simulation, both can examine the logical design the accuracy, and can enable the entire simulation system the normal work.
Connects the above hardware model, under produces the chart to show the hardware system molded relief map:
Figure 2. Mini Web card hardware module circuit diagram
Figure 2 U11 is SMART the MEDIA simulation model, U4 is DMA the Controller model.
Hypothesized network card
Makes the system simulation, must input from the real world drive, and transmits simulation system’s output the real world. Even if cannot connect the real world, should also provide the simulation real world the input, and carries on the examination and the analysis to simulation system’s output.
Regarding Mini the Web card, it and the true environment is through the net mouth connection. Uses the hypothesized network card technology, can MAC C Model and the hypothesized network card carries on Figure 3 the communication.
Regarding the movement on the Windows system’s application procedure, it did not know that the network card is hypothesized or real, the application procedure through the hypothesized network card receiving and dispatching data, is in fact is carrying on the network service with the simulation system.
This may use TFTP to Mini the Web card simulation system transmission homepage document, uses IE to glance over Mini in the Web card simulation system’s homepage, Mini Web card all functions can examine.
The use network searches Sniffer to be possible smelly to monitor the hypothesized network card’s text class, convenient agreement debugging.
Simulation acceleration technology
The software and hardware union simulation, affects the simulation velocity the bottleneck in the HDL code part simulation. If does not try to enhance the HDL code part the simulation velocity, software debugging on unusual low efficiency.
Enhances one of hardware simulation velocity methods is the software hardware simulation uses the event synchronization, only when CPU visits IO maintains the software and the hardware is the synchronization.
Second simulation acceleration method are the hardware simulation system clock dormancy. Regarding Mini the Web card, only then DMA Controller is the clock controlling, the software has not operated DMA Controller period, the DMA Controller operation is meaningless, therefore may in non-DMA operation period, carries on the dormancy to the clock; ISS51 when each time the IO visit, gives with the previous IO visit time difference, this time difference may take the clock dormancy after processing the time section. If ISS51 carries on the IO visit continuously, will not have the clock dormancy. DMA the Controller work in the inquiry way, may use the clock dormancy technology, but will not cause the simulation not to be inconsistent with the real result.
Third method are, reduces SMART in the MEDIA simulation model some length time delay time parameter. Because in waited for when SMART MEDIA enters the ready state, CPU must inquire IO continuously, affects the simulation velocity. We mainly use in the software function confirmation, this kind of revision is also acceptable.
Fourth method, in the software design, use the external interrupt discretely, once because the interrupt enable inte, ISS51 needs in each machine cycle to inquire whether to have the signal of stop, causes the software simulation and the hardware simulation carries on the synchronization in each instruction, affects the simulation velocity. If must certainly use the external interrupt, suggested that replaces the Verilog model with the C model, like this may not affect the simulation velocity; Or acts according to the external module by the user to have the external interrupt opportunity, uses ISS51 the control command, enables ISS51 in the appropriate time the interrupt module.
In ordinary PC (CPU is AMD fast dragon 1000, SDRM512M 133), moves Mini the Web card simulation system, uses the PING order to test Mini the Web card simulation system’s speed of response:
Reply from 10.10.112.76: bytes=32 time=64ms TTL=128
Uses IE to open Mini in the Web card simulation system’s homepage document, the feeling and the digit dialing surfer speed difference are not too many. Founds many TFTP connections, simultaneously to the simulation system transmission or the downloading homepage document, simultaneously uses IE to carry on the homepage browsing, does not have the response interrupt phenomenon to appear.
Summary
The use software and hardware union simulation, Mini the Web card does not need the hardware to be able to carry on the complete function the simulation, strengthened system design the successful confidence. The software and hardware union simulation convenience system design adjustment, may in the design earlier period appraisal performance, the convenient software and hardware’s debug, be the technology which is worth promoting.
