Proof technique development
In the present integrated circuit design, the chip scale and the complex degree are assuming the index to increase, designs the chip function for the guarantee the accuracy, needed to spend compared to formerly more time and the manpower, the degree of difficulty increases largely. Moreover, present function confirmation ability already by far fell behind the designed capacity, the function confirmation is becoming the large-scale chip design the bottleneck. The designers usually need to spend 50%~70% time to confirm their design. Although has the formal verification and so on many kinds of proof techniques to be possible to supply the choice, but the designer by chance based on the simulation confirmation, in this article confirmation mainly refers to the simulation. In order to reduce the confirmation the work load and the enhancement confirmation efficiency, more and more designers use high-level confirmation language (HLV) to carry on the chip confirmation.
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Proof technique’s development has mainly experienced the following several stages:
1. Based on HDL language confirmation
Establishes with the HDL language tests the platform and the compilation test vector, the excitory input will give the design, then inspection design output. This method’s shortcoming is tests the platform and the test vector establishment and the compilation is complex and difficult, and confirms the drive which needs to achieve the enough coverage fraction with difficulty.
2. Object-oriented confirmation
Because uses the HDL language to carry on the confirmation the limitation, the designers may use the object-oriented higher order language (for example C , Python) to establish the confirmation environment and the compilation drive. This proof technique may cause the designers from the quite abstract design high-level, carries on the modelling to the design input and the output, then through the confirmation environment and simulator’s correspondence connection, the data model which will abstract transforms a bit form the data. This proof technique reduced the compilation drive work load greatly, but the confirmation environment’s establishment is relatively complex, for instance confirmation environment and simulator’s correspondence connection and so on.
3. Has the drive stochastically
Because the test drive compilation’s work load is big, therefore the designers use gradually have the test vector method stochastically, reduces the compilation drive the work load, and enhances the confirmation the coverage fraction. But its shortcoming lies, because the drive is produces stochastically, therefore has brought certain difficulty for the confirmation result’s inspection, the drive which and the designer cannot act according to must confirm the design attribute which produces needs, namely cannot have the drive according to the restraint.
4. Confirms the platform tool
Because the confirmation environment’s establishment is too complex, therefore appeared has confirmed the platform tool, might reduce the establishment confirmation environment greatly through this kind of tool the work load. But this kind of confirmation tool cannot cause to confirm the personnel to compile the drive through the design abstract level, moreover cannot realize the design succession behavior inspection.
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Confirmation automated system
Because the above proof technique more or less has the limitation, therefore needs one kind of perfect confirmation system. States according to the previous section, one kind of perfect confirmation automated system needs to have the following several functions: First it can define the confirmation plan; Then can provide the connection, produces with the higher order language from the abstract level based on the restraint drive; And can facilitate establishes the confirmation environment highly effective; Finally can complete the design succession behavior the confirmation and based on the assertion function coverage fraction confirmation.
the e language is one kind of function formidable confirmation language, it may realize a confirmation automated system well, as shown in Figure 1. In this confirmation system, first may according to verifier’s need, formulate some restraints with the e language, has the drive which according to these restraints the confirmation needs. As a result of e may well with Verilog and the VHDL simulator correspondence, therefore may these with a e language abstract description data conversion bit form, then the load give the design; Through with simulator’s correspondence, carries on the function simulation again to the system, and will design the output collects, by now might the bit form data conversion e language abstract description, be advantageous to designs the behavior and the anticipated result carries on the inspection. In addition, the e language may also realize the design succession behavior inspection. If an interrupt must after the request 5 cycles sends out, may describe this design attribute through the e language, inspects it through the simulation whether to satisfy. Finally, the e language may also use for to carry on based on the assertion function coverage fraction confirmation.
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Based on e language confirmation environment and simulator’s interaction
In concrete introduction before e language confirmation environment, introduces first based on the e language confirmation environment and simulator’s correspondence mechanism. At present, Cadence Corporation’s tool Specman the Elite support establishes the confirmation automated system with the e language, Specman Elite provides may dispose, may use and confirm the module expandably again, these modules are called eVC. eVC uses the high-level confirmation language e compilation, can have enough many test drive signal, and can design the behavior and the anticipated result carries on the inspection confirmation. eVC may reduce the confirmation time enormously, improves the product quality. Therefore this article take Specman as regularly introduced how based on the e language’s confirmation environment and the simulator is the joint operation.
Specman and the simulator in the simulation process are two independence parallel advancements, they (the stubs document) carry on the correspondence through the correspondence connection, its structure as shown in Figure 2.
The simulation environment contains following each constituent:
Specman: The entire confirmation environment is realizes with the e language, including the restraint, the drive to have, the actuation, the inspection, the coverage fraction and so on, all e document by the Specman translation and simulation.
Simulator: Verilog or the VHDL simulator, it carries on the correspondence through the stubs document and Specman.
Outside storehouse: The simulation uses some models possibly are based on the C language, the e language may induct these models to carry on the simulation well.
Design: Based on Verilog or VHDL design.
Simulation document: Some exterior model which possibly uses in the simulation, like main line functional model and so on.
Top layer: Including design and each kind of model example and some actuation input or collection output register.
Stubs document: Specman reads in all e document, then produces the Stubs document which with an order needs, this document in the simulation process is by the simulator translation and the simulation.
Based on e language confirmation environment
Based on the e language’s confirmation environment including many constituents, its basic structure as shown in Figure 3.
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And the data object represents the fixed form the test vector, like in data packet, a video frequency data, or CPU one kind of instruction. The drive production will increase certain restraint to the data object, will produce stochastically based on the restraint drive. In the input actuation including an input routine, is responsible the data feeds to give the design, according to the design difference, has the possibility to design carries on the redundant multiple input. In output gathering including a gathering design output’s procedure, the data conversion data object definition form which and will gather, then delivers the data check module to carry on the inspection. The data procedure which the data check part produces needs the data which and the memory collects, and completes the data check. The agreement inspection through defines in some successions the assertion to monitor the design the agreement, if will violate the agreement to have the warning or the wrong prompt. The coverage fraction analysis can analyze in the design the assertion, gives the design the function coverage fraction report.
Specman provides restrains the interpreter and the communications channel carries on the e language the simulation, the contact surface object (interface object) is responsible the data object actuation to give the design the contact surface, the system object (system object) including each kind of different contact surface object. The contact surface object and the system object act according to each design to compile, like when carries on the confirmation to CPU, according to design definition input for CPU data object (instruction format and so on), therefore the confirmation environment does not need to change along with the design change, therefore a design’s environment is may entrust with heavy responsibility. The different test drive through the bound data object, the contact surface object, the system object produces. Confirmation environment’s division diagram as shown in Figure 4.
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Based on e language’s confirmation environment’s document hierarchical structure as shown in Figure 5, its most top document name fixed is sys, melts all modules as follows in sys.
Conclusion
This article introduced the present overseas each big chip design company uses newest proof technique - - based on e language automated proof system. Uses the e language establishment confirmation environment, the compilation test drive, may reduce the chip to confirm personnel’s work load greatly, raises the confirmation efficiency.
