• Based on FPGA MPEG-4 codec encoder-decoder - 51RD Chinese electronic net

        Whether you once did want to use the advanced video compression technology in yours FPGA design, actually discovered that realizes extremely complex? Now you do not need into a video frequency expert to be able to use the video compression in yours system. The match spirit thinks of the MPEG-4 encoder/decoder endorse which promotes newly to help you to meet the video compression need. 

        The video frequency and the multimedia systems become day by day complex, therefore whether to obtain is suitable checks your product going on the market in yours system’s low cost reliable IP to be extremely essential. Specially, the video compression algorithm and the standard turned the extremely complex electric circuit, needs to spend the very long time to design, and becomes the bottleneck which frequently the system test and delivers goods. Perhaps these MPEG-4 simple (simple profile) the encoder/decoder nucleus happen to can satisfy your next multimedia system design the need.

    Using
        The MPEG-4 2nd part is in the following international video frequency code standard series the newest standard: H.261, MPEG-1, MPEG-2 and H.263. This standard is taken in 1999 by the ISO/IEC authorization “International standard 14 496-2″ (the MPEG-4 2nd part). The MPEG-4 2nd part of video frequency codec encoder-decoder has provided a remarkable foundation for the massive multimedia applications. This standard has provided group of characteristics and the rank, may satisfy the massive different application request, like frame size and use error recovery tool. These application example including broadcast, video frequency edition, teleconference, safe/surveillance, as well as expense electron application. 

        The MPEG-4 2nd part of use’s video frequency encoding algorithm is comes before the code standard development. The frame data divides into 16×16 a great block, each great block contains 6 8×8 blocks, uses in the YCbCr 4:2: 0 formatted data. Uses half picture element resolution to carry on the estimate to the movement to be possible to use for to come from the preceding forecast block to carry on the highly effective code, but discrete cosine transformation (DCT) has provided the remaining processing function, founds the current frame a more detailed view. The simple compression standard provides 12 resolution the DCT coefficients, with each sampling 8 sampling and reconstruction frame data. The MPEG-4 simple code’s efficiency surpasses previous generation’s coding efficiency which under a series of code bit rate uses in MPEG-2. 

        The typical multimedia system may use MPEG-4 to take the video compression module in a bigger system. This kind of systematic example is the end-to-end video frequency conference system, it may transmits the compression between two or the many people in attendance the potential flow. These source’s name may change the system request, because of conference’s main orator or attendant possible need high resolution video frequency and audio frequency. This type’s system may expand to the video frequency surveillance and the safe application, the display console user may decide that demonstrated to all video frequency camera use phosphor dot plate, gathers Yu the camera view, carries on the detailed real-time analysis. These carry on using the request class’s choice in the receiver place, and can process the real-time examination standard. 

        The MPEG-4 decoder endorse uses aims at the expandable multi-class connection which your application and the system request have custom-made to construct specially, simultaneously the MPEG-4 encoder and the decoder may also support the user stipulation the biggest frame size. 

    Architecture
        Figure 1 and 2 have demonstrated the MPEG-4 simple encoder and the decoder nucleus diagram separately. These designs used based on hardware’s assembly line construction, on the encoder have provided a host interface, used in realizing the software control speed control. The use content’s memory controller, encoder’s primitive capture sequence and decoder’s reconstruction frame is saved in the piece external memory, so that fast, low detention deposit picture element data. It has also provided a simple FIFO connection, uses in transmitting the compression potential flow, the decoder may assign quantity according to the user the potential flow to have custom-made the construction. It also contains a system connection, realizes the biggest controllability and the observability. 

        Must found may meet the different application need the expandable multi-class design, has contained the massive users assign when the translation the parameter along with in the nucleus supplementary’s product package, thus enables you to be possible to have custom-made the encoder and the decoder. Must found the resources highly effective design, you may also establish the biggest support frame the width and the altitude. Then after translating the design will contain the enough memory and the register, supports is lower than or is equal to these two parameters the random frame size. Other parameters may let you to the elasticity which designs finally carry on control completely, constructs one to use in your application system specially carefully.

        Table 1 and Table 2 bases have listed the encoder and the decoder nucleus FPGA resources to the biggest support frame size and the decoder input potential flow quantity’s different parameter establishment. Table 1 all encoder design has used 16 embedded XtremeDSP™ slices, but Table 2 decoders have used 32 embedded XtremeDSP slices. These designs in view of Virtex™-4 the part, these parts contain the massive 18 Kb block SelectRAM™ memory and the embedded XtremeDSP slice. Other compatible FPGA series including Virtex-II, Virtex-II Pro and Spartan™-3 component. 

        Please note, the decoder design may act according to the potential flow number instantiation which must support to input the FIFO number and to support the multiplexing/minutes automatically to use the electric circuit. The MPEG-4 encoder may realize each second the approximately 48,000 great block turnovers rate, provided has surpassed the simple rank 5 turnover rate standards the enough power. At the same time, the MPEG-4 decoder design may maintain each second the approximately 168,000 great blocks the turnover rate, has provided (720×480,60 fps) the video frequency class or 14 CIF resolution video frequency class carries on the decoding to two by line of SDTV the enough turnover rate. This decoder turnover rate is the rank 5 simple encoders and the decoder nuclei needs above turnover rate four times.

    Conclusion
        The MPEG-4 simple encoder and the decoder nucleus uses is in sole possession, expandably, the multi-class functional design, satisfies your specific system requirements. The massive different applications may use these nuclei in the multimedia systems, including the video frequency conference, the security and the surveillance, as well as you must to the world demonstration any thrilling new expense application.

        These video frequency design has used the high turnover rate, the assembly line construction as well as enough may have custom-made the parameter, founds uses in your application resources highly effective design specially.

    Author: Research engineer Paul Schumacher high-level assistant, the match spirit thinks of company paul.schumacher@xilinx.com 

          Wilson Chung the high-level assistant video frequency and imagery processing engineer, the match spirit think of company wilson.chung@xilinx.com

         The author competes the spirit to think of company’s Robert Turney, Nick Fedele, Adrian Chirila-Rus, Mark Paluszkiewicz and Kees Vissers, as well as the IMEC member does the contribution expresses thanks.

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    Saturday, September 6th, 2008 at 02:02
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