• Based on Nios soft nucleus CT machine sweeping system controller design

    The abstract CT sweeping system controller is a real-time multi-task control center, it needs to complete the real-time communication, to step-by-step the motor control, the data acquisition control, the scanning sequential control and so on complex function. This article based on the Nios soft nuclear technology, the design has completed the CT machine sweeping system controller, including take piece of FPGA as the core SOPC system hardware and based on the embedded real-time operating system Nucleus application software. 
    Key word SOPC Nios soft nucleus multi-duty real time system

    1 introduction

        In recent years, the programmable logical component’s development, caused SOPC (System On A Programmable Chip, on programmable piece system) became possibly, namely realized the overall system together on the programmable chip. Nios is Altera Corporation develops may use in the SOPC design the processor soft nucleus. Based on Nios soft nucleus SOPC system, its most major characteristic is nimble, may according to own need to change Nios nimbly the auxiliary equipment, causes the hardware to achieve high, simultaneously it using the efficiency has ISP (In System Programmable, in system programming) the function, may reduce, may expand, may promote. This article used the merit which fully the Nios system had custom-made nimbly, the design has realized a set of CT machine sweeping system controller.

    2 CT sweeping system controller

        CT machine is according to the different density and thickness object to the X-ray absorption degree different principle, adopts the computer image formation technology, to patient body image formation one medicine equipment. The CT machine sweeping system has the system by the X-ray, the data acquisition system, aims at the grid three sub-system compositions, as shown in Figure 1. The sweeping system by a scanning load bearing, scans the frame is a solid of revolution, the sweeping system along with a scanning revolving, obtains under the different angle the human body information, scans the frame to revolve one week obtained data to be possible to produce the image.

        In sweeping system’s three parts, the X-ray has the system to have the beam, the sweeping system controller and it corresponds through the CAN main line, transmits the X-ray parameter and the action command, simultaneous reception X-ray generator status messages. The data acquisition system is responsible for the X-ray sampling and the transmission data, its sweeping system controller uses the RS422 main line with its correspondence, the transmission control command, and receives the instruction execute condition. Simultaneously has the IO connection to serve as the sampling trigger pulse and the sampling enables. Aims at the grid to adjust the X-ray through the back plate the aperture width, the back plate step-by-steps the motor-driven by one. The sweeping system controller receive from higher authority’s aperture width instruction, then sends out the steering impulse, the control step-by-steps the electrical machinery to arrive assigns the position, step-by-steps the electrical machinery rotor position signal through the encoder receive, forms the closed loop.

        The CT sweeping system controller is responsible for three sub-system’s coordination controls, for sweeping system in equipment’s communication center and control center. First it and previous cascade control unit correspondence, the receive instruction and reports various subsystems condition, next and various subsystems correspondence, the transmission control command, and receives subsystem’s status messages. It acts according to the control command which and the scanning positional information receives, the control alignment grid arrives assigns the width, produces controls the X-ray to occur with the sampling succession. Obviously, the CT sweeping system controller has included the real-time communication, the motor control, the sequential control, is more than a duty system. And is also very high to the timely request, any succession has the deviation, can cause the nonessential damage to the patient.

        This article uses SOPC the way, has designed take piece of FPGA as the core CT machine sweeping system controller hardware, has had custom-made based on Nios the soft nucleus FPGA system, then has designed based on the real-time operating system Nucleus application software, has realized the CT machine sweeping system controller’s above function.

    3 based on Nios hardware design

        This article has used Altera Corporation’s FPGA Cyclone EP1C20, it has the sufficient programmable resources to realize SOPC. Because system all functions realize by FPGA, the hardware circuit only need add on besides FPGA saves the component and some physical level connection chip then. This article has used piece of 8M Byte FLASH, piece of 16M Byte the SDRAM, CAN main line transceiver and the RS422 main line transceiver and so on takes FPGA the auxiliary equipment, hardware circuit’s structure understands simply, enhanced system’s reliability. The FPGA systems operation clock is 50MHz, has guaranteed system’s operating speed.

        Software package may have custom-made through Altera SOPC the Builder based on Nios the soft nucleus FPGA system, it has provided some basic Nios peripheral device module, like UART controller, timer, FLASH controller, SDRAM controller and so on. This article designs CT sweeping system controller FPGA internal structure as shown in Figure 2.

        Nios is the running water line structure RISC soft nuclear processor, it may choose 32 constructions or 16 constructions. This article uses 32 constructions, and has established 4K in SOPC Builder the Byte data buffer and the instruction buffer, saves the CPU read data and the instruction time, enhances the system performance.

        As seen in Figure 2, the Nios soft nucleus connects through the AVALON main line with each expansion module. The AVALON main line is uses in the Nios connection peripheral device specially one kind of bus structure, it has the separation address, the data and the pilot wire, and provides functions and so on dynamic dynamic main line width control. The Nios soft nucleus is its main equipment.

        On the AVALON main line has the SDRAM controller from the equipment, the Flash controller, the timer, the correspondence connection UART controller and the CAN controller. When designs the Nios soft nucleus the peripheral device, uses the existing IP nuclear power effective reduction design cycle, simultaneously underwent the full confirmation the IP nucleus also to guarantee the design reliability. This article according to needed to use three UART controllers to take the Nios soft nucleus the peripheral device, used in separately with the higher authority unit correspondence, and the data acquisition system correspondence and the debugging information output; Also used CAST Corporation’s IP nucleus to make the CAN controller, it supported the CAN 2.0 agreements.

        In FPGA internal, has used 4 Kbyte ROM, in this ROM has contained GERMS which Altera provides the Monitor start vectoring procedure, it may realize the start guidance, procedure downloading and the basic debugging function. In the debugging, through the debugging serial port and GERMS the Monitor correspondence, the reflection document which might carry out downloads to SDRAM or FLASH.

        Moreover, this article according to the application the special request to design and step-by-steps the motor control module from the definition module - - scanning sequential control module. In the SOPC system, the easier selective system function is realizes by the movement in the Nios software, uses the FPGA hardware to realize, from this may the balanced system software and hardware’s function, enable the efficiency to achieve high. The system function the superiority which realizes with the FPGA hardware lies in the data the parallel processing, the real-time response is quick; But realizes with the processor software the superiority lies in the communication and the complex situation judgment and so on. In this article to enhance system’s timeliness, will step-by-step the motor control to realize in FPGA. Step-by-steps motor control FPGA module as shown in Figure 3.

        Right side Figure 3 is the AVALON bus interface, by selects patches or strips of land as worth saving for seed, the address wire, the data line, the read-write enable with the signal of stop to compose. Left side is the FPGA output, namely with step-by-steps the electrical machinery driver connection: DIR is step-by-steps the electrical machinery movement directional control, Pulse is step-by-steps electrical machinery’s steering impulse, HOFF is maintains a signal. Underneath three signals for encoder’s feedback signal, respectively are a pulse, the B pulse and the initial point signal. Step-by-steps the motor control module to receive Nios the target position information which transmits through the AVALON main line, then the basis current position and the target location, obtain arrives at the goal to step-by-step electrical machinery’s pulse number, sends out the corresponding pulse. At the same time, according to the feedback encoder signal, the decoding obtains the electrical machinery current positional information, and whether judges step-by-steps the electrical machinery movement achieve object position, the control duty whether to complete. Then has the interrupt, informs the Nios soft nuclear end of mission situation. Obviously the movement in the Nios software only need the target location notice motor control module then, greatly reduce the CPU burden.

    4 software designs

        May see by the preamble, the sweeping system controller needs to complete many functions, the software system is complex, moreover corresponds, link requests and so on scanning control, motor control very high real-time and the concurrency. In this case, will use the tradition to have the very major difficulty before the backstage embedded software design method, the software design structure is complex, the work load will be big, and the development cycle will be long, the function will expand is limited. The embedded real-time operating system has provided the good development platform for the system software design, undertakes the system resources management responsibility. This simplified the application programming, has safeguarded the software quality, reduced the development cycle. This article has used the Nucleus operating system which ATI Corporation develops, Nucleus is forestalls the type multi-duty operating system essence, has the source code to open, the performance-to-price ratio to be high, functional module rich and so on merits.

        In this article, the software architecture may divide into three structure levels, the lowest level for the hardware abstract level, is mainly composed of the Nios soft nuclear peripheral device driver interrupt service as well as the board level initialization routine, the peripheral device driver including the UART controller, the CAN controller, step-by-steps the motor control module, the scanning control module driver, this part is the operating system and the first floor hardware’s connection. Second and serves for the Nucleus operating system essence, it provides the task scheduling, the interrupt management, the memory management, services and so on timed control. The topmost story for the application software level, moves above the operating system, completes all application function.

        According to the system function, application software structure as shown in Figure 4:

        The system administration unit is the system work core, including two duties: Order analysis duty and system mode control duty. The order analysis duty receives the higher authority control unit instruction, its analysis the task object which needs to complete for each subsystem, gives each subsystem control unit concurrently. The subsystem control unit control subsystem completes the instruction. The system mode control duty is a state machine, is controlling the CT sweeping system’s running status. It acts according to the current system mode and the higher authority instruction, the judgment system’s goal movement, the gated sweep succession, simultaneously with various subsystems management unit correspondence, synchronized various subsystems manages the single task execution, and various subsystems condition transmission for on cascade control unit. This article uses the signal quantity and event’s method synchronization various duties.

        The data acquisition management unit is the controller and data acquisition system’s connection, it is responsible for data acquisition system’s initialization, the data acquisition parameter establishment, the data acquisition system condition monitoring and carries on processing to its error status. This procedure divides including the serial port communication receive duty and the data acquisition system management task.

        May know by the preamble step-by-steps the motor control function to realize by the FPGA hardware, therefore the alignment grid management unit’s work becomes very simple, it from the system mode control section receive alignment grid aperture width, transmits it for step-by-steps the motor control module, then through step-by-steps the motor control module interrupt service, the monitor task completes the situation.

        Is similar with the data acquisition control, the beam generator control section is responsible for the beam generator the initialization, the ray parameter establishment, the monitoring beam generator condition and unusual circumstance processing. It has the control duty and the CAN communication processing duty including a beam. The beam has the control duty to complete the beam generator responsibly the parameter management and the condition monitoring, CAN the communication end of mission CAN main line data receiving and dispatching function.

        The above duty is the event driven way, when the system does not work, the Nios processor is at the idling condition, like this may reduce the system power loss. The duty the communication uses pipeline (Pipe) the way, pipeline’s merit is the data which may transmit lengthens. The CT sweeping system controller needs the receiving system disposition, the scanning, the failure diagnosis and so on different length on cascade control instruction, therefore uses the pipeline in the order analysis duty and between the correspondence connection duty to carry on the communication, on the other hand the order analysis duty to various subsystems control duty transmission’s command length is also indefinite, therefore also selects pipeline’s method with three sub-system administration unit communication.

        The reasonable disposition task priority is the embedded system software reliable work essential condition. In this article, the duty basis important degree may divide into three levels: First is the system mode control, it is the systems operation main center, simultaneously controls is scanning the succession, must guarantee the state control duty the unimpeded movement, therefore it has the highest priority to suppose is 1. Next is with the previous cascade control unit connection, including the serial port communication task and the order analysis duty, the controller must the accurate receive higher authority unit order and the prompt feedback, therefore these two task priority supposes is 2. Finally is various subsystems management task, beam management unit, if the misoperation, possibly creates the harm to the personnel, therefore its two task priority is high, supposes is 3, other subsystem management unit duty is low supposes is 4.

        This article application software uses the GNU overlapping compiler translation, then software debugging passes after ATI Corporation’s Codelab.

    5 experimental verifications

        Debugs the CT sweeping system controller for the confirmation, built has tested the platform. Tests the platform by PC machine, the CT data acquisition system and the alignment grid is composed, PC machine the simulation CT sweeping system controller’s higher authority unit and the X-ray has the system.

        Through the monitor with the cascade control unit’s communication, the survey aims at grid’s aperture width up and down, surveys the data acquisition which and the beam the controller outputs have the control signal profile, proved that this article designs the CT sweeping system controller can satisfy the multi-duty real-time processing the request.

    6 conclusions

        This article used the SOPC way design to realize the multi-duties, real-time response CT sweeping system controller. The hardware design take the Nios soft nucleus and FPGA as a core, fully characteristic which has custom-made nimbly using the SOPC system, simplified the circuit structure, reduced the design cycle, lightened the processor operation burden. Meanwhile based on the embedded real-time operating system Nucleus structurization, the hierarchical application programming, has guaranteed system’s software quality and timeliness. The experiment indicated that this article designs the CT machine sweeping system controller satisfies the multi-duty real-time processing the request.

        This article author’s innovation spot: The use has realized the real-time multi-task control system based on the Nios soft nucleus and real-time operating system’s way, has used the characteristic which fully the Nios soft nucleus has custom-made nimbly, used the hardware acceleration the way to lighten the processor burden, has guaranteed the system performance. Line SOC develops platform 499 Yuan S3C44B0 the ARM7 development board

    Reference
    [1] Chu Zhen is brave, Weng Muyun.  FPGA designs and applies [M]. Xi’an: Xidian University Publishing house, 2002.7
    [2] Nios Embedded Processor 32-Bit Programmer’s Reference Manual[Z], Altera Corporation, January 2003.
    [3] Nucleus PLUS Reference Manual[Z], Accelerated Technology, Inc. 2000
    [4] Guo Yanfeng, Yang Zhi family. Based on SoPC foundation field bus SoC prototype project and confirmation, micro computer information, 2005.1

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