Abstract: The PL3200 chip is one kind of compatible 8051 instruction SoC chip, it contains many function expansion module, has the electrical energy survey, the carrier wide frequency and so on formidable function. This article introduced that PL3200 the main feature and the carrier communication functional module, and aims at this chip to propose one kind of power line carrier communication realizes the plan.
Key word: PL3200 direct sequence spread spectrum carrier communication 8051
Introduction:
The wide frequency correspondence is treats the transmission the message data by the pseudo-random code modulation, after realizing the frequency spectrum expands, transmits again, the receiving end uses the similar pseudo-random code to carry on the demodulation and related processing, restores the primary data. This mailing address and the common narrow band mailing address are different, is the spread spectrum less advanced line width belt correspondence, carries on related processing again in the receiving end, after restoring the narrow band, demodulates the data. The wide frequency correspondence has the strong anti-jamming, the anti-noise, the anti-multi-diameters to decline, may merits and so on code multiplying, is the quite advanced communication.
The power line carrier communication is refers to with the power circuit carries on the correspondence as the correspondence media, at present is widely applied in the industry automatic control system, electrical energy situations and so on management system management system, domestic electric appliances system and computer terminal interface. It uses the ready-made power circuit to transmit the data, does not need other to erect the communication link, also does not take the existing correspondence frequency resources, is suitable specially in sets up the small local area network and realizes in the building automatic control. But on the power line the clear signal transmission, the working conditions is bad, the line impedance is small, and disturbance greatly time denaturates in a big way, the ripple noise the influence and the signal weaken is also very big to the data. The wide frequency mailing address is usually big because of its wide frequency intelligence signal’s band width, but is disturbed the frequency range accounts for the proportion to reduce relatively, therefore may on the good elimination power line’s random disturbance. At present, the power line carrier communication is developing toward the use wide frequency communication’s direction.
PL3200 has power line carrier communication function to inlay 8051 enlargement mode high speed microprocessor’s new SoC product. This chip uses the new CMOS number/mold mixing techniques manufacture, has the cost to be low, the performance is high, function formidable and so on characteristics, can the very convenient application in the power line correspondence domain.
1 PL3200 main feature
PL3200 was in has inlaid 8051 instruction high speed microprocessor chips, its software easy to develop, has 8/16 double model type ALU, could 8 times fast in the standard 8051 processors, the running rate be quick, data-handling capacity. Figure 1 is the PL3200 basic function structure diagram.
The PL3200 chip uses 0.35μm the ultra large-scale number/mold to mix the CMOS fabrication technology, has many intellectual property rights SoC (System on Chip) to design. This chip built-in high accuracy digit multi-purpose electrical energy measurement electric circuit, the measurement standard conforms to international GB/T completely 17883 and GB/T 17215; The electric current channel built-in may procedure hypothesis gain amplifier (PGA); Built-in double channel electric current sampling,/negative work instruction digital logic electric circuit; The built-in wide frequency correspondence modulation/demodulates the electric circuit; Built-in 4×32 section LCD display control/driving circuit or 8×8 section LED display control/driving circuit; Built-in may the digit accentuation solid clock; Built-in may carries on the temperature piecewise linearity compensation to the electrical energy measuring accuracy and the solid clock precision the temperature sensor; Built-in 2.5V±8% potential source datum; The built-in serial program memory programming connection, supports in the system programs (ISP); Uses the 5V single power source power supply; Built-in consummation supply voltage observation circuit.
in 2 inlays the microprocessor partial function outline
In PL3200 inlays the enlargement mode 8051 compatible microprocessors, have disposed 8/16 ALU, 256B 1024B SRAM as well as 16KB E2PROM, 3 8/16 timer/counter, 1 watch-dog timer as well as 3 external interrupt, provide the rich embedded resources and the ideal application for the user develop the platform. Its enlargement mode 8051 compatible microprocessors, use the super instruction assembly line construction, in same level basic frequency situation, 8 times fast in standard 8051 microprocessors. Moreover, this chip also has two full-duplex UART (general asynchronous transceiver), may dispose is the 38kHz infrared communication pattern, another may dispose is the RS485 correspondence pattern, has provided many kinds of convenience data transmission ways.
3 carrier communication module principle and function establishment
In the PL3200 chip integrates the carrier communication unit uses the QPSK modulation system, and has the invariable pseudo-random symbol speed rate (band width) multi-address communication. The carrier communication unit selects the direct sequence spread spectrum method. Mainly includes the intelligence signal in the wide frequency receive’s process the capture and the synchronization.
The capture is receives the module before the wide frequency sequence precise synchronization, the search received signal, causes the received signal the wide frequency sequence and the local wide frequency sequence enters in the scope which on the phase may the synchronization maintain, namely the two’s phase in a wide frequency sequence element. Because the carrier communication unit selects the wide frequency pseudo-code has the very strong autocorrelation, therefore through between the quite local pseudo-code and receiving sequence’s relevance and the hypothesis threshold value’s height, can in the capture process determine whether to stop the pseudo-code the glide, completes the capture. After the capture completes, enters the track stage, dynamic adjusts the local pseudo-code producer’s clock rate, enables the local pseudo-code and receives the signal the pseudo-random code to maintain the precise synchronization automatically. The wide frequency sequence’s tracking channel uses the entire digital baseband detention locking link (delay locked loop) the electric circuit. In the carrier communication unit each time sets after the transmission condition, the hardware will first transmit 40 pseudo-code cycles entire “1″ the sequence, will use in causing the receiving end and the transmitting end pseudo-random code synchronization and uses in distinguishing a frame head’s 8 pseudo-code cycle frame sequence, the software does not need to carry on corresponding processing. In the carrier communication unit sets after the receive condition, the hardware after each time the pseudo-random code synchronization, will start to search for a frame sequence from the data stream. After picking out a frame sequence, only then truly starts to receive the data, and delivers in the SSC_BUF register by the byte way. In the carrier communication unit, processes a byte every time the data, is carries on the data through between the SSC_BUF register and CPU to realize alternately.
PL3200 uses the QPSK modulation system to the wide frequency data, its carrier center frequency is 120kHz, the pseudo-random symbol speed rate may achieve 30kbps and 15kbps. Is different according to the pseudo-random code’s speed, the data rate may achieve 1kbps and 500bps. Because this chip has used 63 Gold/Kasami sequences, thus has realized the code division multiple access, its address number are most may reach 40, 32 Gold sequences, 8 Kasami sequences, because has used the spread spectrum technology, may cause between various addresses the disturbance to reduce to is smallest.
The carrier communication unit each time after receiving condition transfers sends condition, CPU should in 4ms the recent due-out data fill to the SSC_BUF register, otherwise the hardware after 4ms, by will send automatically condition transfers receives condition. The carrier communication unit is when sends condition, should each time transmit the buffer mark is the free time, the recent due-out data will fill in immediately the SSC_BUF register. When the last byte due-out data fills in after the SSC_BUF register finished, CPU carries on the data exchange process ended. The carrier communication unit after the complete data transmission completes, by will send automatically condition transfers receives condition (compulsion by to send condition sets to receive condition will possibly cause last byte data loss). In the receiving end, after each time corresponds the data packet normal receive finished, the software may through to the carrier communication condition register (00H) wrote the operation, forced the notice receive logic to make a fresh start the recent data frame search.
The PL3200 carrier communication unit’s concrete hypothesis, is through to the carrier communication register group (SSC Register Bank) the different address register, reads in corresponding the control word to realize. When establishes the function, reads in the carrier communication register group’s address which first to carrier communication control word address selection register (SSC_ADR) in selects, then reads in the hypothesis to carrier communication control word data register (SSC_DAT) the control word. The carrier communication register group (SSC Register Bank) various addresses correspondence’s register like table 1 arranges in order.
When the PL3200 carrier communication register group, to the address is 02H (carrier communication control register 1), 04H (pseudo-random code capture threshold register) and 05H (pseudo-random code fine synchronization threshold register) carries on writes the operation, must cancel writes the protection, only then may read in the data corresponding in the register. When no longer carries on to the register writes the operation, should write the protection to enable. Cancels writes the protection the method is, reads in FFH with the procedure to the SSC_ADR register, selects writes protection register’s address, reads in FFH again to the SSC_DAT register, then cancels writes the protection, and carries on by the procedure to the corresponding register writes the operation. In carries on after the corresponding register writes the operation, by the procedure to the SSC_ADR register reads in FFH, reads in non-FFH again to the SSC_DAT register in the data, will write the protection to enable. In the carrier communication register group, the 00H register uses for to instruct that the carrier communication unit is in receives condition sends condition, as well as data and frame head’s receive transmission symbol; the 02H register may establish choice pseudo-code the type (the Kasami code perhaps the Gold code), the pseudo-random code address selection position (the Kasami code may choose 8 addresses, the Gold code to be possible to choose the data rate which 32 addresses) as well as the pseudo-random code’s speed (the 30K symbol speed rate either the 15K symbol speed rate) and determined from this (1Kbps or 500bps); the 03H register uses for to establish the pseudo-random code capture the threshold threshold value, when carrier communication unit for receive condition, will establish this locality with the pseudo-random code sequence phase sync capture threshold value which will receive, the hardware according to each pseudo-code cycle to the pseudo-code which local will produce with the pseudo-code which will receive will carry on the computation, the computation result AND gate limiting value compares, if will be smaller than the threshold value will make a phasing, the tuning band will be half pseudo-code element width, when until will be higher than the hypothesis the capture threshold value, only then no longer will make the adjustment, when a wisdom pseudo-code code rate will be 30K, the capture threshold value will adjust to 40H about; the 05H register uses in establishes when the accepting state, this locality and transmitting end pseudo-random code sequence phase sync fine synchronized threshold value, when is higher than the pseudo-noise code acquisition threshold value, will make the fine synchronization control, the hardware may distinguish the pseudo-code phase which the local pseudo-code and receives is in advance or lags, thus makes forward or the phasing backward, when is smaller than the hypothesis threshold value, thought that the fine synchronization the synchronization, no longer will already make the adjustment.
4 apply in the wide frequency carrier communication design
Using the PL3200 wide frequency carrier communication function, designs a data to receive and dispatch the platform. The data sends out by PC machine A serial port RS232, after MAX232 level switch, sends in chip PL3200. In the chip, by the expansion serial port UART receive data, inlays 8051 control processing first after, sends in the carrier communication unit, carries on the direct sequence spread spectrum to the data, after the wide frequency signal after the 120kHz carrier frequency modulation outputs. This signal after power amplification may from the coil coupling to the low pressure power line on, realize the power line carrier communication. In the receiving end, comes out first through the coil power line on signal coupling, carries on the filter restriction to the signal, after will restrict the signal sends in PL3200 to carry on the capture, the synchronization and despread processing, inlays 8051 controls by way in, by chip UART serial port, after level switch, delivers PC machine B the RS232 connection, enters PC machine. Otherwise, the B data transmits according to the opposite way for A. Entire platform’s structure diagram as shown in Figure 2.
Carrier communication for main line way correspondence, therefore the carrier unit’s habit must establish as the receive condition, may assign the different mailing address to the carrier module. Because the carrier communication speed is opposite lowly in the basic frequency many, to raise the CPU efficiency, the data receive and the transmission design for interrupt mode processing, each time enters the interrupt, completes to the data receive or the transmission processing operation.
According to the data transmission process, with the C language compilation chip’s control procedure, design master routine flow as shown in Figure 3.
The system is in charge of the procedure less advanced on electricity, carries on the replacement operation in the master routine time delay stage, afterward carries on the resources initialization operation, makes the initialization establishment to the register. In order to prevent the procedure to cause because of the accidental means to halt, PL3200 has designed a set of watch-dog electric circuit specially, when after the procedure halts, passes through a section the time which fixed time controls after the register, the watch-dog electric circuit repositions 8051. Therefore, procedure in movement time, once in a while is separated, must reposition the watch-dog electric circuit unceasingly. Will reposition the watch-dog electric circuit’s operation forming interrupt subroutine, after once in a while, to the variable assignment, the replacement watch-dog electric circuit, this namely feeds the dog operation. After carrying on the partial register’s initialization reset, the procedure inspects the carrier receive interrupt and the serial port receive interrupt in turn. If has the carrier data, enters the carrier receive interrupt, sends in the carrier buffer array the data, along with evacuation serial port transmission. If has the serial port data, defers to the agreement form to take out the data, stores the serial port data buffer array, after treating the data receive completely, enters the carrier transmission interrupt, delivers the carrier transmission the buffer in data, after the success, eliminates the flag bit. The master routine enters the circulation once more, the examination carrier interrupt or the serial port interrupt. The master routine to interrupts carries on the loop check, until has the data interrupt occurrence, enters the interrupt handling routine.
When the carrier communication unit interrupt enables the position is effective, the CPU interrupt 2 will be disposed in the carrier communication, uses in the data byte transmission or the receive interrupt. When has the carrier interrupt, procedure inquiry carrier communication register address 00H bit0 position: When this is 0, enters the carrier accepting state; When this is 1, enters the carrier transmission mode.
Carrier receive interrupt’s flow as shown in Figure 4. In the carrier receive’s process, must inquire a carrier communication register 00H frame flag bit first, if receives the frame head, and the chip is at the waiting accepting state, then the receive data first byte; If receives is not the frame head, then judgment frame whether to have been received, but continues to receive the following byte. Finally, will receive the data sends in the carrier data buffer array, if the receive byte count surpasses the setting value, then sets receives the successful position to give the serial port, and eliminated the accepting state position, the conclusion carrier interrupt, entered the serial port transmission interrupt.
Carrier transmission interrupt’s flow as shown in Figure 5. After the serial port receives the data, sets at the carrier to transmit the flag bit, enters the carrier transmission interrupt. The interrupt routine sends in the serial port buffer data set’s in data according to the byte the carrier buffer transmission, surpassed the hypothesis byte count until the carrier transmission’s byte count, the conclusion carrier transmission, and clear serial port buffer data set data. After elimination carrier transmission symbol, the conclusion interrupted, the returns master routine, carried on the next round the transmission receive inquiry.
Conclusion
Uses SoC the chip PL3200 design power line carrier wide frequency data platform, the application is extremely simple, uses the C language to carry on the programming to be convenient. At the same time, because uses the nimble ISP programming way, causes the procedure the revision and downloading is also very convenient, may nimble carry on the function expansion.
