• New instead stirs up converter accurate resonance controller ICE1QS01 and the application electric circuit and the design

        Abstract: ICE1QS01 is one kind of support low power waits for an opportunity adjusts (PFC) with the power factor the switching power supply accurate resonance controller. Introduced the ICE1QS01 basic structure, the principle of work and the application electric circuit and the design.

        Key word: Accurate resonant controller; ICE1QS01; Instead stirs up the converter; Design

    Introduction

    ICE1QS01 is one kind of output scope which Infineon Corporation promotes from 1W to 300W, the belt or does not bring the power factor adjusts (PFC) instead to stir up-like the converter controller. This controller IC work in accurate resonant pattern, model application including the TV, VCR, DVD broadcast machine, satellite receiver and notebook adapter and so on.

    For in the underloading drop low power consumption, ICE1QS01 along with load reduction, its turn-on frequency digital drops to 20kHz gradually the minimum value. At the same time, reduces along with the frequency maintains the accurate resonant pattern. From the full load to the idling entire load scope, can work steadily. When the operating frequency reduces, the IC digital anti-vibration electric circuit may eliminate the zero crossing signal the continual beat, the vibration which particularly may avoid because in the television deflecting causes the load which changes continuously produces. For the throttle closure MOSFET switch stress, the power transistor always puts through on the lowest voltage. The voltage regulation already may use the internal erroneous amplifier, may also use the exterior optical coupler. Because uses the new primary adjustment method, in the transformer control winding and between the control input’s exterior leveling circuit, the available voltage divider substitutes. In waits for an opportunity under the pattern, IC enters automatically arises suddenly the pattern, waits for an opportunity the power input to be lower than 1W far. The protection function has pressed/undervoltage locking including Vcc, the master line voltage undervoltage shutdown and the current limitation and so on. The ICE1QS01 starting current approximately 50μA, it is only one kind of low power loss green SMPS chip.

    1 chip seal and circuit composition and function and principle of work

    ICE1QS01 uses the P-DIP-8-4 seal, pin arrangement as shown in Figure 1. Table 1 has listed various pins function.

    Table 1 pin function

    Pin 

    Mark 

    Function summary

    1

    N.C

    Has not connected

    2

    PCS

    The primary flow simulation (simulation) inputs

    3

    RZI

    Adjustment and zero crossing signal input

    4

    SRC

    Soft start and regulating capacitor coupling end

    5

    OFC

    Overvoltage breakdown comparator input

    6

    GND

    7

    OUT

    The MOSFET electronics grid driver outputs

    8

    VCC

    The supply voltage exerts the end

    The ICE1QS01 chip mainly by the comparator, the trigger and the digital processing electric circuit is composed, specific as shown in Figure 2.

    In shown in Figure 2 in the electric circuit, the top left-hand corner part (foldbackpoint) adjusts the unit for knee bend. This part of electric circuit’s function is in MOSFET breakover period, flows out electric current from foot RZI, the 0.5mA electric current which current supply CS4 provides is deducted, obtains electric current I4 is multiplied by 0.2 (i.e. is I3), is presented IC the PCS foot, thus increases the PCS foot exterior electric capacity’s charging voltage slope. When the AC circuit voltage elevates, the MOSFET breakover time reduces, the peak power output maintains invariable. The master line voltage examines through the Vcc bias winding and after the connection on a foot RZI resistance.

    In foot RZI, threshold level 5V and the 4.4V comparator uses in the primary adjustment, threshold level 1V and the 50mV comparator respectively is the ringing suppression time comparator and the zero crossing signal comparator.

    In Figure 2 top right-hand corner is the digital frequency which the counter, the timer and the comparator compose reduces the electric circuit as well as the opposition input end is VRM=4.8V and VRH=4.4V and brings the VRH locking comparator and opposition input end VRL=3.5V and brings the VRL locking comparator.

    Central committee is the soft start and passes in Figure 2 - breaks (on-off) the trigger. Starts the trigger through to pass softly - breaks trigger’s rise along (and uses along detector ED1) the setting. Passes - breaks the trigger to pass opposition input end 15V (left the comparator Figure 2 underneath) the setting. Above this comparator is the 20V Vcc overvoltage comparator, below is 14.5V and 9V owes the voltage comparator. IC foot PCS internal resistance R2 connects a switch, this switch by an AND gate output control, and gate input from passes - breaks trigger’s output. When the switch puts through, foot PCS exterior electrostatic discharge 1.5V. When enters the PCS foot’s electric current is lower than 100μA, in the master line owes the voltage comparator to output produces a low level output signal. This output signal after an AND gate and the or gate electric circuit setting pulse locking trigger, AND gate another input is the turn-on time trigger’s inverted output.

    What located at Figure 2 among underneath is arises suddenly the trigger and the pulse locking trigger. Arises suddenly in trigger’s to output the setting by IC foot SRC 2V comparator. Arises suddenly trigger’s output, connects the pulse to lock trigger’s setting input. The pulse locks trigger’s output, affects the turn-on time trigger’s reset input. The turn-on time trigger’s output, connects IC in foot OUT the output buffer. The pulse locking trigger may also by the 20V overvoltage comparator setting.

    IC foot SRC internal current supply CS1 is the SRC foot exterior capacitor provides 500μThe discharging current. With CS1 parallel current supply CS2, through starts the trigger to activate softly. The CS2 electric current changes gradually through the 50ms timer control, produces the rise adjustment voltage take this as the soft start.

    A 20kΩ upper control resistance R1 lower extremity in the internal connection SRC foot, the upper extreme connects 5V through the switch the reference voltage. This switch by a trigger’s output control, this trigger drops through the turn-on time trigger’s output along the setting, has the ringing suppression time. The turn-on time trigger passes through an AND gate by the zero crossing signal to reposition, this AND gate’s another input is lower part the second trigger’s output. When on the RZ1 foot’s pulse height surpasses 4.4V the threshold, second trigger setting.

    Right upside digital frequency reduces in the electric circuit in Figure 2, after 4 Canada/reduces (UP/DOWN) the counter checks the number decision transformer demagnetization the zero crossing signal number. Zero crossing signal counter counting input zero crossing signal, and by a comparator examination and enlargement. So long as the zero crossing counter memory number and adds/reduces the counter memory number to be equal, the comparator transmits an output signal to the turn-on time trigger, thus causes the power MOSFET breakover. In order to avoid vibrating, adds/reduces the counter the memory number only after 50ms the timer definite each 50ms cycle adds 1 or reduces 1 change, this kind of change takes in VRH and the VRL lock saves the condition. If two locks save are in the lower state, the counter increases 1. If only the VRL locking setting, added/reduces the counter still not to change. If VRL and VRH by the setting in the high level, are added/reduce the counter to reduce 1. After this VRH and the VRL locking is repositioned. In following 50ms, VRH and the VRL lock will save once more setting. When IC on foot SRC voltage VSRC<3.5V, the VRL locking setting, adds/reduces the counter to add 1; When VSRC>4.4V, the VRH locking setting, adds/reduces the counter to reduce 1. After a big load jumps this, for can adjust in rapidly the biggest power level, so long as time VSRC>4.8V, adds/reduces the counter by the setting to 1 (0001).

    Figure 2

    2 applications and design

    2.1 application example and circuit Jan Xi

    Figure 3 is makes controller’s 200W by ICE1QS01 the high-end television SMPS electric circuit. This electric circuit inputs the AC90~264V,4 road output voltage/electric current respectively is 135V/0.75A,30V/1.2A,15V/0.5A and 7V/1.2A.

    The connection outputs in the bridge-type rectifier with large capacity filter electric capacity C07 between on line’s inductor L08, diode D08 as well as in the D08 positive electrode and power switch S01 between drain electrode electric capacity C08, composes the PFC electric charge pump electric circuit. Its function is with the input end EMI filter together, may produce the sinusoidal current in the bridge-type rectifier input end. In ICE1QS01 integrates the low power to wait for an opportunity arises suddenly the pattern electric circuit, may cause to wait for an opportunity the power input to be lower than 1W. When the load reduces, can cause the turn-on frequency using the integration digital processing electric circuit to reduce gradually, does not have any vibration. When waits for an opportunity the switch S1 separation, the reference diode D60 breakover, the output voltage V2 adjustment value determined by zener diode D61. When ICE1QS01 foot 4 on VSRC is lower than 2V, integrates the sharp-edged pattern electric circuit starts on the chip. After the activation interior arises suddenly the pattern comparator, the electronics grid actuates the output (OUT) to cut the low level, the Vcc shutting down threshold increases 14.5V from normal pattern under 9V. Is arising suddenly pattern period, MOSFET breakover time at least for its biggest breakover time 1/7. (Tbreake) reduces between the arising suddenly interruption interval, the output ripple recharging electric current reduces through the spanning in the AC master line input and diode D26 and D27 between contact electric capacity C21.

    Diode D62 is the normal pattern with waits for an opportunity arises suddenly between the pattern the state of transition to join. When waits for an opportunity switch S1 closed, but output V2 already no-load time, joined D62 to be possible to guarantee in arose suddenly under pattern the normal cycle. When V2 changes is low, reference diode D60 is shut off.

    ICE1QS01 foot 3 non-essential resistance R38 and R29 act as the transformer pulse the voltage divider, the foot 3 on pulse amplitude modulation pams approximately are 4V. Electric capacity C29 serves as reduces the transformer overswing. His/her foot 2 with DC between skeleton line voltage’s resistance R22 decided that owes the voltage locking threshold. R22 and electric capacity C22 unifies, may fix the most greatly possible output.

    Figure 3

        2.2 key element choices

    2.2.1 transformer design main point

    In shown in Figure 3 in the application electric circuit, the transformer T1 parameter has marked basically. Only briefly narrates transformer’s formula in this.

    First, must calculate the SMPS biggest power input. If the SMPS peak power output is Pout(max), the efficiency for Eta (usually takes 80%), biggest power input Pin(max) is

    Pin(max)=Pout(max)/η    (1)

    In lowest AC under circuit voltage VAC(min), the SMPS primary smoothing capacitor (e.g. Figure 3 C07) on DC voltage VDC(min) is

    In the formula: Fhum=0.9, is on the primary capacitor the 100Hz voltage ripple coefficient;

    VAC(min) under the general width scope AC supply line, usually is 85V or 90V.

    In highest AC circuit voltage VAC(max) (for example 264V), on primary capacitor’s highest DC voltage VDC(max) is

    In the formula: Fcp is on the primary capacitor’s overvoltage factor, when SMPS does not bring PFC, Fcp=1; If SMPS brings PFC, Fcp=1.1.

    May (4) calculate through primary winding’s great mean current IP(max) based on the type.

    IP(max)=Pin(max)/VDC(min)    (4)

    The transformer primary winding number of windings Np formula is

    In the formula: Vd(max)=600V, is the MOSFET permission highest drain electrode voltage;

    Bmax=300mT, for transformer magnetic core biggest permission magnetic-flux density;

    Fos is the primary winding overswing factor, when does not bring PFC, Fos=1.3, when brings PFC, Fos=1.8;

    Magnetic core effective cross-sectional area Ae and parameter AL, may from the data which provides according to the Pin(max) choice’s transformer look up.

    Each circle secondary voltage Vts is

    Vts=[Vd(max)-Vdc(max)]/NpFos    (6)

    MOSFET biggest drain electrode electric current Id(max) is

    MOSFET biggest breakover time ton(max) and biggest cut-off time toff(max) distinguishes available -like (8) and the type (9) calculates.

    SMPS most is low the free oscillation (freerunnign) the frequency is

    If SMPS lowest frequency fmin<20kHz, namely enters may hear the audio frequency scope, should according to type (5) the recomputation, Bmax take a low value.

    Outside 2.2.2 ICE1QS01 various pins key element’s choice consideration

    The application electric circuit which regarding shown in Figure 3, IC1 (ICE1QS01) outside various pins key element’s selection basis is as follows.

    1) IC1 foot 2 (PCS) on resistance R22 and electric capacity C22

    When flows in the foot 2 electric currents are lower than 100μA, the internal master line undervoltage protection circuit starts. According to type (2) takes 114V on electric capacity C07 lowest DC the voltage VDC(min), therefore R22=1.14MΩ, may take 1MΩ the calibrated resistance.

    After R22 designation, electric capacity C22 may according to type (11) calculate.

    C22=VDC(min)ton(max)/(R22×3.5V) (11)

    2) foot 3 (RZ1) non-essential resistance R38, R29 and electric capacity C29

    The R38 formula is

    R38=VDC(min)Nr/(Np×0.5mA) (12)

    In the formula: Nr is the transformer (T1) adjusts the winding number of windings.

    When selects the VDC(min)=114V, Nr=7 circle and Np=

    when 28 circles, R38=57kΩ, but? Takes 56kΩ the calibrated resistance.

    R29 and R38 composition regulating winding induced tension voltage divider. The regulating winding induced tension (just when) is 15V, considered primary and the secondary adjustment, R29 may according to type (13) and the type (14) determined.

    R29=R38/((15V/5V)-1) (13)

    R29=R38/((15V/4V)-1) (14)

    In R38=56kΩ, the R29 value scope is 20~28kΩ.

    The electric capacity C29 formula is

    C29=1000ns/R38 (15)

    According to the above, C29 may choose 22PF the porcelain capacitor. Chooses C29 to be possible suitably 3 to obtain the satisfying voltage waveform in the foot, guarantees MOSFET on the smallest drain electrode voltage the breakover.

    3) foot 4 (SRC) on ground capacity C28

    Meets the electric capacity influence adjustment particularly primary adjustment the speed, but does not affect the soft toggle speed (reason is internal digit soft starting circuit by activation). C28 usually selects 1.5~10nF Rong Zhi.

    4) foot 7 (OUT) exterior MOSFET grid resistor R35

    The choice R35=33~100Ω, (EMI) between provides the ideal trade-off decision in the MOSFET wattage dissipation and the radio noise.

    5) the foot 8 (VCC) exterior anti- accommodates the part

    Electric capacity C26 capacity selection 33μF (25V) then. If C26 is oversized, the starting time is excessively long, and arises suddenly the frequency to be low.

    C27 acts as the radio frequency filter electric capacity, may select C27=100nF.

    Resistance R26 may use in increasing arises suddenly the frequency, the value scope is 0~50 OMEGA. R37 acts as the radio frequency filter element and plays the stabilization to Vcc, the value scope is 0~100 OMEGA.

    The ICE1QS01 foot 5 (OFC) does not use the earth.

    3 conclusions

    ICE1QS01 is one kind the new accurate resonant controller which optimizes, it uses suiting in the low end television’s low cost primary adjustment may guarantee that SMPS safely, reliably and works effectively. Because this kind of adjustment technology did not need the secondary feedback loop which isolated to reduce the cost. In order to meet the needs which waits for an opportunity lowly, this IC increased the intermittent pattern specially and uses uniquely digital reduced the frequency characteristic technology, eliminated the influence system stable vibration and the support stable output voltage.

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    Saturday, September 6th, 2008 at 07:03
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