Abstract: Take TI Corporation LF2407 the DSP controller as an object, introduced that based on CAN 2.0B the main line agreement’s peripheral device connection module e-CAN examination programming, gives hardware system’s constitution diagram and the software realizes the process related code. The laboratory debugging indicated that this procedure may use for to determine the ID identifier and the shield code correct or not as well as mailbox’s working condition, simultaneously can reduce in the project early time research process to the hardware module demand.
Key word: CAN main line correspondence: DSP programming; CAN controller self-checking; Digital signal processor
1 introduction
LF2407 digital signal processor (DSP) by its handling ability strong (30 MI/s), the peripheral device functional module integration rate is high and the storage capacity big and so on characteristics widely apply in the numerical control and correspond the domain. The author carries armament system’s preliminary advanced research take some vehicle as a background, discussed in this processor to inlay module eCAN the measuring ability and the software and hardware realizes the process.
2 examination system’s function and hardware constitution
2.1 eCAN control module
This controller is a 16 bit periphery component, its characteristic includes: (1) supports the CAN2.0B agreement completely; (2) has 6 mailboxes, mailbox2 and mailtiox3 may or transmit the mailbox according to the project demand disposition for the receive, the data length is 0-8 bytes; (3) when transmits when makes a mistake or in the arbitration process the data missing, this controller has the automatic reproduction function; (4) can realize through the software programming from the measuring ability.
Divides into to the eCAN module’s operation to controls, condition register’s visit as well as to the mailbox RAM read-write three parts. These registers and the mailbox in memory space’s assignment as shown in Figure 1, 7200H~7230H in the RAM region is 6 mailbox’s distributed addresses.
2.2 hardware circuit’s connection
Speaking of the LF2407 processor, if after source code translation, places space which the procedure area 0×0000 address starts. When the pin nap/mc disposition is the mp way. Then under 00~7FFF the space is mapped the exterior memory, this time must have the corresponding memory only then normal overload outside DSP, otherwise has prompted “Data verificationfailed at address Ox0.P1ease verify target memory andmempry map” information. When the pin disposition is the mc way, then 00~7FFF this section of spaces provide by internal Flash, the code procedure must place in internal F1ash, must use the fever to write the operation to complete. In general, the former is suitable for the online debugging development way: Regarding software code which already finalized, when wants the off-line movement uses the latter to be more convenient. Outside the author selects expands memory’s way to complete the *.out document the load. And 74 positive 8 component’s functions are CY7C1021 electric circuit’s memory region one point two, serves as the procedure space which and the data space outside separately expands.
As shown in Figure 2, PCA82C250 is the main line driver. Is in LF2407 inlays the interface circuit which between the CAN controller and the special main line needs, realizes to main line’s differential motion transmission and receptivity. When the hardware connects must pay attention the RS pin earth causes PCA82C250 to be under the high speed pattern, moreover for completes the measuring ability, the CANH pin and the CANL pin should the reflexless terminal resistor connects through the resistance number for 120Ω.
In the project performance history, author uses brings the ISA connection simulator to actuate the board. Although does not need the driver. But must install the SetupC2XX.exe document. Otherwise integrated development environment will have the debugging difficulty in Code in the Composer.
3 software programming
3.1 dispose the memory
Because designs time the hardware what uses is outside expands memory’s way. Therefore to load the output file correctly. Must make the guidance disposition to CY7C1021. Mentions is specifically revises initgel in the document the StartUp function (this function under the system default condition for the blank letter number. In general, when each time enters person Cede the Composer integrated development environment, it can transfer. Lays aside frequently regarding hardware system’s initialization code in among them). Below gives the main code statement:
StartUp0
{
GEL_MapReset0;
GEL_MapAdd(0×0000,0,0×7fff,1,1);
GEL_MapAdd(0×8000,0,0xT000,1,1);
GEL_MapAdd(0×0000,1,0×10000, l,1);
GEL_MapAdd(0xffff,2,1,1,1);
GEL_MapOnO;
GEL_MemoryFill(0xffff,2, l, Ox40);
* (volatile unsigned int*) SCSRI=0×0200;
* (volatile unsigned int*) SCSR2=0×000C;
* (volatile unsigned int*) WDNTR=Ox006f;
* (volatile unsigned int*) WDKEY=0×055;
* (volatile unsigned int*) WDKEY=Ox0AA;
}
If needs to develop the corresponding Flash fever to write the subroutine. May refer to this part of forms to complete.
3.2 system initializations or redeploy the position timer
The corresponding sequence of operation is as follows:
(1) establishes in the CANMCR register’s change disposition request position is 1, namely CCR=I:
(2) judges in the CANGSR register’s change disposition to enable the position whether is 1, namely CCE whether is l:
(3) establishes CANBCR2 and the CANBCRl register by determines the baudrate, the synchronized skipping width and the sampling number of times and so on
in (4) clear CANMCR register’s change disposition request position is 0. is CCR=0
(5) judges in the CANGSR register’s change disposition to enable the position whether is 0, namely CCE whether is 0;
(6) disposition completes enters the normal work pattern. The main program code is as follows:
(*MCRB) = (*MCRB) 10×00c0;
(
(*CANIFR) =0xffff;
(*CANLAMlH) =0×7fff
(*CANLAMlL) =Oxffff;
(*CANMCR) =Oxl040;
while(((*CANGSR)&Ox0010)==0); if //CCR were not equal to that 1 piece carries on the software waiting status
(*CANBCR2) =Ox0002;
(*CANBCRl) =0×0023; //BaudRate=500 kb/s
(*CANMC R) = (*CANMCR) &0xefff;
while(((*CANGSR)&0×0010)==I);
According to the CAN2.0B agreement constitution’s main line communications system, between the node baudrate error margin request is quite high. Compares with the RS232 serial communication way. Because its frame size is bigger than the latter far, considers the accumulation effect the influence, even if will be the very small baudrate error will also cause the data exchange defeat. The baudrate r related formula is:
r=-{fcLK/(Brp 1)}/(TSEG1 1) (TSEG2 1) 1 (1)
And, Brp is pre-frequency division coefficient fCLK is the LF2407 operating frequency of, its value is product of the exterior crystal oscillator body oscillator frequency and the phase-locked loop frequency multiplication or the frequency division coefficient, time section TSEG1 and TSEG2 reigns in disposition register BCR2 to define. In this system the crystal oscillator frequency is 15MHz, the phase-locked loop frequency multiplication coefficient is l, then r= (15 MHz/3)/{(4 1) (3 1) 1), namely 0.5 MHz.
3.3 mailbox’s initialization
Related flow as shown in Figure 3.
The partial codes are as follows:
(*CANMDER) =0×0040; // mailbox 2 dispositions for receive,
The mailbox 3 are the transmissions
(*CANMC R1=0×0140;
(*CANMSGID2H) =0×7fff;
(*CANMSGID2L) =0xffff;
(*CANMSGCTRL2) =0×0008;
/* here uses in increasing receives mailbox’s initial datum value */
(*CANMSGID3H) =0×7fff;
(*CANMSGID3L) =Oxffff;
(*CANMSGCTRL3) =Ox0008;
/* here uses in increasing transmits mailbox’s initial datum value */
(*CANMCR) =0×04C0;
(*CANMDER) =0×004c;
3.4 information transmissions
After the data writes transmits mailbox’s data area. If the corresponding transmission request position enables. Then the information frame is transmitted to the main line network, the entire process inquires the way completes.
The concrete sequence of operation is as follows:
(1) initialization transmission mailbox;
(2) establishes in the CANMCR register’s mailbox to enable the position is 1, namely MEN=I;
(3) establishes in the CANTCR register’s transmission request position is 1, namely TSRN=I; ·
(4) waiting transmission answering signal TAN or the transmission interrupt the flag bit MIFN setting:
(5) Clear to Send interrupts the flag bit and the transmission reply position, namely writes to the TAN position 1 then.
The procedure code is as follows:
(*CANTCR) =0×0020;
while (((*CANTC R) &Ox2000) ==o);
*CANTCR) =0×2000;
delay(2); // software time delay sub-function
3.5 information receives
The receiving process interrupts the way completes. The concrete sequence of operation is as follows:
(1) establishment partial shields the register;
(2) determination receives mailbox’s identifier and the control register;
(3) waiting receive information is hanging position RMPN or the receive interrupts the flag bit MIFN setting:
(4) is hanging position RMPN to the RCR register’s in receive information to write 1, eliminates the receive to interrupt the flag bit and the receive information is hanging the position. For next time meets punishes the preparation.
The corresponding interrupt servicing subroutine is as follows:
void CANMBXISRfvoid) //mailbox2 receive interrupt servicing subroutine
{
(*CANMDER) =Ox0040;
(*CANMCR) =Ox0143;
(*CANMBX3A) = (*CANMBX2A) Ox0012;
(*CANMBX3B) = (*CANMBX2B) 0×0034;
(*CANMBX3C) = (*CANMBX2C) Ox0056;
(*CANMBX3D): (*CANMBX2D) 0×0078;
(*ANMCR) =Ox04C0:
(*CANMDER) =0×004o;
(*CANRCR) =Ox0040; // duplicate lives in the RMP2 sum. MIF2
}
3.6 test results
Test result as shown in Figure 4, after will lay aside mailbox data the memory region (0×7214~Ox721f) corresponding unit makes the difference in the value and the programming code displacement quantity carries on the comparison, may know the mailbox 2 with other parts to be able the normal work, moreover the ID identifier and the shield establishment are correct, otherwise the memory region does not receive the correlation data.
4 concluding remark
With the aid of debugs the successful eCAN examination procedure in the laboratory, so long as position is “1″ may cause CANMCR register’s STM from “0″ the replacement LF2407 to withdraw from receives/sends the condition. If matches (communications system which by some CAN main line data exchange node for example PCI04 and SJAl000T components and so on independent CAN controller constitutes) to be possible again to form “point-to-point” the correspondence pattern. Because the examination pattern and the normal correspondence condition have not distinguished nearly, moreover the former is relatively low to the hardware request, therefore in engineering project earlier period performance history. The examination procedure has the practical significance.
