• With realizes - en.51rd.net based on the FPGA digital switching system’s design

    Abstract: This article proposed one kind realizes the plan based on the FPGA digital switchboard. In the plan carries on processing using FPGA to the PCM signal, has realized the telephone channel exchange, the control interface, the clock signal and the signal sound in FPGA produces and so on major function, simplified the hardware circuit greatly, and has the obvious superior extendibility compared with the traditional plan.
    Key word: Digital switching system; Scene programmable gate array; Design

      The private exchange is too formidable the specialized function, as well as expensive price, by no means small fishing net ideal choice; At the same time, the traditional PBX analog switching way exists distorts big, owes nimble as well as along with the scale increases, but order of complexity sharp increase insufficiency. This article proposed the plan, is different with commonly used PBX the analog switching, is one kind is suitable for the certain scale local area network’s digital switchboard. The FPGA use while had guaranteed the performance enhances, also had the obvious improvement in the order of complexity and the extended aspect.

    First, system structure
      This system realized had 16 group inside connection telephones, simultaneously to have 4 group outwire connection digital switchboard, system structure like chart 1.

      (1) user interface and PCM code part
      The user interface electric circuit selects the IDT Corporation’s 821611 chips, this chip and code chip IDT821034 coordinates good. The subscriber’s line corresponds one piece respectively 821611, four groups users turns on one piece 821034 (adjustable gain four group PCM code chip), the final 4 piece of 821034 PCM signal (16 groups) hang together meet on the PCM main line, sends in FPGA. What must pay attention, 821034 use similar SPI (Serial Peripheral Interface) the serial control interface, enables us to use brings the SPI monolithic integrated circuit (e.g., Analog Corporation’s Aduc812), realizes very conveniently to many piece of IDT821034 controls.

      (2) outwire connection
      An outwire connection part is responsible for outwire’s bell class examination and the transformer (only through pronunciation) turns on. The bell class examination has used SGS Corporation’s LS1240. Whenever the bell class enters, sends out the high level to FPGA, thus measured that knows outwire’s inhaling. Another part for arranges the decoding part with inside connection’s in SLIC and the CODEC similar pronunciation, after being responsible for will exchange the digital signal transfer the pronunciation delivers the outwire (or outwire pronunciation and the DTMF code, sends in FPGA).

      (3) DTMF receive and prompt pronunciation production
      In the system, 20 groups telephones (including 4 groups outwires) the multiplying 4 group DTMF endorsement chip carry on the endorsement. FPGA will be due in the number telephone channel PCM signal to deliver the current idle endorsement module. The DTMF receive completes by MT8870, between FPGA and MT8870, some piece of MT8965 (single channel pronunciation arranges decoding chip), sends out the digital signal FPGA to transfer the simulated signal to read by MT8870. But exchanges the process the prompt pronunciation to select ISD4004 (pronunciation recording and sending out chip, the SPI control), meets its speech output in the MT8965 pronunciation input end, sends in FPGA again by the PCM coded form. Each group DTMF receive and the pronunciation send out are the fixed time slot, the exchange control complete in FPGA.

       (4) FPGA 
      FPGA as the hard core, is responsible for the digital switching, the signal sound have and the control, the endorsement control, the prompt sound control, the outwire interface control, the clock has and so on functions. For with the periphery component coordination, selects compatible 5V connection FPGA (for example Altera ACEX 1K). Detailed showing gives in behind.

       (5)MCU
      MCU (here selects Analog Corporation’s Aduc812, has including SPI nimble user interface) is responsible for the overall system movement process the dispatch and the flow control. Software design’s some details will also carry on showing in behind.

    Second, PGA logical design
      In system’s PCM signal (user pronunciation, outwire pronunciation, prompt pronunciation 3 kind of pronunciation’s PCM coded signals) need to process and the exchange; The telephone needs the signal sound (digit dialing, prompt, busy and so on) need to produce; Although MCU is responsible for overall system’s disposition control, but it also needs the control logic with the component between; At the same time, the system also needs the specific clock and the timing signal. The above these functions, complete by FPGA. Figure 3 is the FPGA top layer hardware diagram.

      MCU through carries on to various functions block’s related operation by the main line read-write register’s way.
      (1) main line control (BUS-TRAN)
      This function block (high 8 address wires and low 8 bit data address multiplying line) transforms the MCU main line into the separated address and the data bus (by the BUS expression).
      (2) SPI selects patches or strips of land as worth saving for seed the production (SPI-/CS)

      In Figure 4 except /SS outside signal by the MCU production, only then the /SS signal needs FPGA to provide. Through the register writes the operation to the function block, produces the periphery component’s SPI-/SS signal.

      (3) DTMF endorsement (DTMF-REC)
      FPGA with 8870 has DATA0-DATA3 (data), StD (condition line), TOE (to select patches or strips of land as worth saving for seed and so on effectively) 6 connected, FPGA inquires the StD condition under the MCU control, when has the pulse, causes 8870 outputs through TOE to be effective, reads the endorsement result again by DATA0-DATA3. At the same time, but must produce the MT8965 pilot wire (CA,/F1i, CSTI) coordinates the endorsement and delivers the prompt sound process.

      (4) outwire examination (EXTERNAL-DET)
      Here only needs the condition line which sends to the outwire connection to carry on the inquiry (to read register way), measured that knows whether to have outwire inhaling.

      (5) the clock produces (TIMING-GEN)
      The system clock frequency division, obtains PCM-FS, PCM-Clock, MCLK (For 821034), OSC (For 8870), C2i (For 8965) and so on clock signals.

      (6) digital switching (PCM-SWITCH)
      This is in the logical design hard core, its diagram as shown in Figure 5.

      Figure 5 INNER refers to the inside connection user, EXTERNAL refers to the outwire user, DTMF refers to the endorsement module, AUDIO refers to the prompt pronunciation module. At the same time, RAM-D uses for to store the PCM data, RAM-ADD uses for to deposit controls the RAM-D read-out the address.

      Each group PCM signal in uses for to mark the time slot the SLOT-CLOCK rise to read in corresponding along the order in RAM-D, the RAM size is 32×2 byte (may accommodate two), guaranteed when delivers a data, does not affect the current frame to read. RAM-ADD is 32 byte RAM, deposits is corresponding circuit’s exchange information, for example, what in RAM-ADD(IN-IN) 0 address place depositing is the inside connection exchanges when hoped 0 time slot inside connection user receives the time slot marking, these information read in by the MCU main line. At the same time, in the SLOT-CLOCK rise along, FPGA reads the RAM-ADD order read-out’s output as the address RAM-D, thus has realized the exchange function. Based on such principle, the system has realized inside connection, outwire, DTMF endorsement, the prompt pronunciation these between nimble exchange (DTMF and the prompt pronunciation is one-way signal, actual on the identical PCM main line).

      (7) the signal sound produces (SIGNAL-GEN)
      The signal audio frequency rate is 450 Hz, only differentiates by the make-and-break time. We have established 450 Hz, the 8k sampling sine table after FPGA (the PCM code), when work circulates reads out and carries on and the string transformation. Carry on processing using the timer and the three states of matter gate to it, thus has formed the make-and-break time different each kind of signal sound. Hangs each kind of signal sound through the three states of matter gate meets on user’s PCM main line, when need, so long as opens corresponding the three states of matter gate, may deliver the correct signal sound in the current time slot.

    Third, work flow and software design
      FPGA was MCU has provided connection with other component’s, enabled its to realize originally the complex first floor operation by the brief instruction. As space is limited, here only makes the brief introduction.

    1. Inside connection telephone conversation
      The inside connection picks machine: If this user calling, delivers the dial tone to this time slot (till digit dialing), simultaneously delivers the calling telephone channel the DTMF module which current has leisure (, if does not have, delivers busy signal) in the time slot, the endorsement completes picks off (or overtime again from the DTMF time slot opens line), according to the endorsement result, looks at the called subscriber condition, busy delivers the busy signal the calling time slot, otherwise delivers the ring-back tone to the calling time slot, simultaneously makes to call the ringing; If this user is been called, then cuts away this user ringing, simultaneously cancels the calling time slot the ring-back tone, these two time slot’s telephone channel exchange, establishes the connection.

      Inside connection on-hook: If talks over the telephone in the connection condition, then cancels the talking connection, delivers to the end time slot busy signal; If non-talking connection, then cancels opposite party ringing (, if exists), and picks off in this time slot all signals.

    2. Outwire telephone conversation
      Outwire inhaling: When measured that the knowledge has when the outwire inhales, if does not have the idle endorsement module, then waited for until presents the free time; Otherwise, will inhale outwire’s coded signal to deliver to the DTMF module time slot, simultaneously will prompt dials the extension telephone number the prompt speech coding signal to deliver to inhales outwire’s time slot, waited for that the digit dialing completes (or overtime opens line). The following process and the inside connection telephone conversation are similar, what is only different is delivers the busy signal to the outwire only to pick off delivers to inhaling outwire time slot all signals then, but gives outwire’s ring-back tone is substitutes by the prompt pronunciation.

      Calls the outwire: After the inside connection picks machine in the endorsement process, when subscriber dialing first for some specific digit (e.g. “0″), thought that calls the outwire, picks off this telephone channel by the endorsement time slot, and seeks for a group idle outwire (, if does not have, then delivers busy signal), carries on the exchange the telephone channel time slot and the outwire time slot, establishes the telephone conversation, the following process and the inside connection telephone conversation are similar, but in only need process the terminal then.

      What needs to pay attention, 821034 serial control interfaces and standard SPI slightly has the difference, effective needs 1 SCLK before /SS, after pulling high, needs 2 SCLK, therefore in the programming in writes SPI around, carried on one time false to write respectively (i.e., in has not pulled low /SS in the situation, wrote SPI) to operate, guaranteed the operation correctness.

    Fourth, conclusion
      In the system, besides the pronunciation to the PCM code section, other telephone channel part realized has digitized completely, might obviously improve the inside connection connection quality (specially is in internal fishing gear certain scale situation). At the same time, IC will realize originally the function integration realized in sole FPGA, reduced the system order of complexity, reduced the cost, increased system’s stability, and this caused system’s promotion to compare in traditional PBX becomes more convenient nimble, the user might according to the request, in did not modify in hardware’s situation to program the way to realize the free function expansion. , Along with scale enlargement, this plan’s above superiority can be increasingly obvious specially.

    Reference

    [1] Ye Min. Program control digital switching and switching network [M]. The second edition. Beijing: Beijing University of Posts and Telecommunications Publishing house, 2003.
    [2] Application Note(AN-408) [Z] .IDT,2003.
    [3] ACEX 1K Programmable Logic Device Family [Z]. Altera,2001.
    [4] Aduc812 Handbook [Z]. Analog Devices,2003.

    Share/Save/Bookmark

    Monday, September 8th, 2008 at 19:02
No comments yet.

Leave a comment

XHTML: You can use these tags: <a href="" title=""> <abbr title=""> <acronym title=""> <b> <blockquote cite=""> <cite> <code> <del datetime=""> <em> <i> <q cite=""> <strike> <strong>

TOP
Copyright © 51 Research and Design, Electronic Engineers website - Embedded Systems, MCU, DSP, EDA, Test and Measurement, Components, Communications, Power, Microelectronics, Semiconductors
Powered by WordPress | Theme by mg12 | Valid XHTML 1.1 and CSS 3