Abstract: Introduced briefly American DALLAS Corporation’s new clock calendar chip DS12C887 function characteristic and the internal control register parameter, has given DS12C887 with 8031 monolithic integrated circuit’s electric circuit connection diagrams, simultaneously has given the initialization routine which compiles with C51 and gains the internal time procedure.
Key word: Clock monolithic integrated circuit DS12C887
1 component characteristic
The DS12C887 real-time clock chip function is rich, may use for to replace on IBM PC directly clock calendar chip DS12887, simultaneously, its base pin also with MC146818B, DS12887 compatible.
Because DS12C887 can produce the century, the year, the month, Japan automatically, time, divides, the second and so on time information, its interior increased the century register, thus using hardware circuit solution “millennium” question; In DS12C887 brings has the lithium battery, when exterior power failure, its internal time information can also maintain 10 year long time; Regarding one day in time record, has 12 small tenses and 24 small tense two kind of patterns. In 12 hour pattern making in the formula, differentiates in the morning and afternoon with AM and PM; The time expression method also has two kinds, one kind indicated with the binary system number, one kind is expressed with the BCD code; In DS12C887 has 128 byte RAM, including 11 byte RAM uses for the storage time information, 4 byte RAM uses for to save DS12C887 the control information, is called controls the register, 113 byte general RAM causes the user use; In addition the user may also carry on the programming to DS12C887 to realize many kinds of square-wave outputs, and may carry on the shield to its internal three groups interrupts through the software.
2 pin functions
DS12C887 pin arrangement as shown in Figure 1, various base pins’ function showing is as follows:
GND, VCC: Direct-current power supply, VCC meets the 5V input, GND earth, when the VCC input is 5V, the user may visit in DS12C887 in the RAM data, and may carry on to it reads, writes the operation; When the VCC input is smaller than 4.25V, forbids the user to carry on to internal RAM reads, writes the operation, this time the user cannot gain in the chip time information correctly; When the VCC input is smaller than 3V, DS12C887 will send automatically the power source trades internal bringing on the lithium battery, will guarantee the internal electric circuit to be able the normal work.
MOT: The pattern choice foot, DA12C887 has two kind of working patterns, namely Motorola pattern and Intel pattern, when MOT meets VCC, selects the working pattern is the Motorola pattern, when MOT meets GND, what selects is the Intel pattern. This article mainly discusses the Intel pattern.
SQW: Square-wave output foot, when power line voltage VCC is bigger than 4.25V, the SQW foot may carry on the square-wave output, this time the user may through to control the register programming to obtain 13 kind of square-wave signal output.
AD0~AD7: The multiplying address data bus, this main line uses the multiplying technology, in bus cycle the first half part, what appears on AD0~AD7 is the address message, available selects in DS12C887 RAM, the bus cycle second half of appears on AD0~AD7 the data message.
AS: The address strobe input foot, when carries on the read-write operation, as rise along the address message lock which presents AD0~AD7 on saves to DS12C887 on, but the next drop along eliminates on AD0~AD7 the address message, no matter whether effective, DS12C887 will carry out this operation.
DS/RD: The data access or reads inputs the foot, this pin has two kind of working patterns, when MOT meets VCC, selects the Motorola working pattern, in this kind of working pattern, each bus cycle’s latter part of DS is the high level, is called the data selection. In reads in the operation, the DS rise along enables DS12C887 to escort to the internal data on main line AD0~AD7, supplies the exterior read. In writes in the operation, the DS drop along will cause on main line AD0~AD7 the data lock to have in DS12C887; When MOT meets GND, selects the Intel working pattern, in this pattern, this pin reads the permission input foot, namely Read Enable.
R/W: Reads/writes the input end, this base pin also has 2 kind of working patterns, when MOT meets VCC, R/W work in the Motorola pattern. This time, what this pin’s function is the discrimination carries on is reads the operation or writes the operation, when R/W is the high level to read the operation, R/W is when the low level to write the operation; When MOT meets GND, this foot work in the Intle pattern, this time this achievement writes the permission input, namely Write Enable.
CS: Selects patches or strips of land as worth saving for seed the input, the low level is effective.
IRQ: The interrupt request input, the low level is effective, this foot is effective to DS12C887 in the clock, the calendar and RAM content not any influence, is only influential to the internal control register, in the model application, RESET may meet VCC directly, like this may guarantee DS12C887 when power failure, its internal control register is not affected.
Has 11 byte RAM in DS12C887 to use for the storage time information, 4 bytes use for the memory stored control information, it specifically filthy address and value like table 1 arranges in order.
May see by Table 1: The DS12C887 interior has controls register’s A-B and so on 4 control registers, the users may carry on visit to it by to carry on the control operation at any time to DS12C887.
Table 1 DS12C887 memory function
| Address | Function | Value scope decimal digit | Value scope | |
| Binary system | BCD code | |||
| 0 | Second | 0~59 | 00~3B | 00~59 |
| 1 | Second alarum | 0~59 | 00~3B | 00~59 |
| 2 | Minute | 059 | 00~3B | 00~59 |
| 3 | Minute alarum | 0~59 | 00~3B | 00~59 |
| 4 | 12 hour pattern | 0~12 | 01~0C AM, 81~8C PM |
01~12AM, 81~92PM |
| 24 hour pattern | 0~23 | 00~17 | 00~23 | |
| 5 | When alarum, 12 small tenses | 1~12 | 01~0C AM, 81~8C PM |
01~12AM, 81~92PM |
| When alarum, 24 small tenses | 0~23 | 00~17 | 00~23 | |
| 6 | Week several (Sunday =1) | 1~7 | 01~07 | 01~07 |
| 7 | Japan | 1~31 | 01~1F | 01~31 |
| 8 | Month | 1~12 | 01~0C | 01~12 |
| 9 | Year | 0~99 | 00~63 | 00~99 |
| 10 | Control register A | |||
| 11 | Control register B | |||
| 12 | Control register C | |||
| 13 | Control register D | |||
| 50 | Century | 0~99 | NA | 19,20 |
3 applications
In each kind of equipment, the electrical appliances, the instrument, in the industrial control system, may compose the time gain unit very easily with DS12C887, realizes each kind of time gain. Figure 2 is with 8031 monolithic integrated circuits and the DS12C887 constitution time gain circuit diagram, the DS12C887 base address is 7F00H, the corresponding procedure uses the C51 language compilation (take Intel working pattern as example).
Gains electric circuit’s initialization routine by 8031 monolithic integrated circuits and the DS12C887 constitution’s time to be as follows:
XBYTE[0x7F00 0x0B]=0×82;
XBYTE[0x7F00 0x0A]=0xA0;
XBYTE[0x7F00 0x0A]=0×20;
XBYTE[0x7F00 0x0B]=0×02;
/* all interrupt inhibit, 24 small tenses, BCD code pattern */
The following gains the time sequencing:
unsigned char data t-century;
unsigned char data t-year;
unsigned char data t-month;
unsigned char data t-date;
unsigned char data t-week;
unsigned char data t-hour;
unsigned char data t-minute;
unsigned char data t-second;
if((XBYTE[7F00 0x0A]&0×80)! =0) {
t-century=XBYTE[0x7F00 0x32]; /* read century */
t-year=XBYTE[Ox7F00 0x09]; /* read year */
t-month=XBYTE[Ox7F00 0x08]; /* read month */
t-date=XBYTE[Ox7F00 0x07]; /* read date */
t-week=XBYTE[Ox7F00 0x06]; /* read week several */
t-hour=XBYTE[Ox7F00 0x04]; /* read hour */
t-minute=XBYTE[DS12887 0x02]; /* read minute */
t-second=XBYTE[Ox7F00 0x00];}/* read second */
4 concluding remark
Dallas Corporation’s clock calendar chip DS12C887 function is rich, the use is simple, the possibility is high, is the time has electric circuit’s good choice.
