Abstract: Analyzes the DSP system to have the disturbance primary cause, gives the antijamming the countermeasure; Take TI Corporation’s DSP chip TMS320LF2407A as the processor constitution control system, through to the overall system PCB stack-up design, the layout and the wiring design, introduced in detail how to strengthen the DSP system’s antijamming ability in the PCB design.
Key word: DSP PCB antijamming
Introduction
Along with DSP (digital signal processor) the widespread application, appears based on the DSP high speed signal processing PCB board’s design especially important. In a DSP system, the DSP microprocessor’s operating frequency may reach as high as several hundred MHz, its replacement line, the broken line and the pilot wire, the integrated circuit switch, the high accuracy A/D switching circuit, as well as includes the weak simulated signal electric circuit to be easy to receive the disturbance; Therefore the design develops one stably, the reliable DSP system, the antijamming design is important.
The disturbance is the interfering energy causes the condition which the receiver occupies did not hope. The disturbance production is divided two kinds: Direct (through conductor, common-impedance coupling and so on) and indirect (through crosstalk or radiation coupling). Many electric appliance launch source, like the illumination, the electrical machinery and the daylight lamp may cause the disturbance, but electromagnetic interference EMI can have the influence to have 3 essential ways, namely the noise source, the dissemination way and the disturbance acceptor, only need to shut off one to be possible to solve the electromagnetic interference problem.
1 DSP system’s disturbance has the analysis< ?XML:NAMESPACE PREFIX = O />
In order to make a stable reliable DSP system, must from each aspect interference elimination, even if cannot eliminate completely, must reduce as far as possible to is smallest. Speaking of the DSP system, main disturbance from the following several aspects:
①Input-output channel disturbance. Refers to the disturbance and latter enters the system through the forward channel toward the channel, if the DSP system’s data acquisition link, disturbs through the sensor iterates to the signal on, causes the data acquisition the error to increase. In the output element, the disturbance may the data error which outputs increase, even completely wrong, creates the system collapse. May reduce the input-output channel disturbance reasonably using the light pair component, may isolate the positive files regarding the sensor and the DSP main system’s disturbance using the electricity thousand to harass says into.
②Electrical power system’s disturbance. Entire DSP system’s main noise source. The power source while provides the electrical energy to the system also to add to its noise the power supply on the power source, must when the power source chip circuit design carries on the decoupling to the power line.
③Space radiation coupling disturbance. Usually is called the crosstalk after the radiation coupling. The crosstalk occurs when the electric current flows through the wire produces electromagnetic field, but the electromagnetic field in the neighbor wire the induction transient current, creates the signal distortion which approaches, even is wrong. The crosstalk intensity is decided by the component, the wire geometry size and the great distance distance. When the DSP wiring, the holding wire spacing is bigger, is away from the grounding to be nearer, more may reduce the crosstalk effectively.
2 aim at has the disturbance reason to design PCB
How does below give manufacture process reduces each kind of disturbance in DSP in system’s PCB the method.
2.1 multiply wood stack-up type designs
In DSP high speed figure electric circuit, to improve the signal quality, reduces the wiring difficulty, increases system’s EMC, generally uses the multiply wood the stack-up type design. The stack-up type design may provide the shortest backflow way, reduces the coupling area, suppresses the bad mold disturbance. In the stack-up type design, assigns the special power source level and the stratum, and the stratum and the power source level close coupling to suppresses the syntype disturbance to have the advantage (use neighboring plane to reduce power source plane alternating-current impedance). 4 plywood which by shown in Figure 1 to regularly explain the stack-up-like design proposal.
Uses this kind of 4 PCB design the structure to have many merits. (The top level) under has a power source level in the top layer, primary device’s power source pin may receive the power source directly, does not need to pass through the horizon. The essential signal chooses the cloth in the first floor (the bottorn level), enables the important signal to walk the space of lines to be bigger, the component places in as far as possible the identical stratification plane. If is not unnecessary, do not make 2 components the boards, like this will increase the time of setting assembly time and the assembly order of complexity. If top level, only then, when the top level module is excessively dense, highly will be only then limited, and the calorific capacity small component, looks like the decoupling electric capacity (to paste piece) to place the bottom level. Possibly has the massive lines regarding the DSP system to want the cloth, uses the stack-up type design, may walk the line in the inner layer. If will waste preciously according to the traditional through hole walks the space of lines, may use buries the hole (blind/buried via) to increase the line area blindly.
2.2 topological designs
In order to cause the DSP system to obtain the optimum performance, primary device’s layout is very important. First lays aside DSP, Flash, SRAM and the CPLD component, this plays gives careful consideration to the space of lines, then lays aside other IC according to the function independent principle, finally considers the I/O mouth the laying aside. Unifies the above layout to consider PCB again the size: If the oversize, will cause the print line to be too long, the impedance will increase, anti-noise ability will drop, makes the board expense also to increase; If PCB is too small, then the radiation is not good, moreover the space is limited, the neighbor line easy to receive the disturbance. Must therefore according to the actual need choice component, unify the space of lines, figures out PCB on the whole the size. When to DSP system layout, the following component places the position to want the special attention.
(1) high speed signal layout
In the entire DSP system, between DSP and Flash, SRAM are the main high speed figure holding wires, therefore between component’s distance must be as far as possible near, its segment is as far as possible short, and direct connection. Therefore, to reduce the transmission line to the signal quality influence, the high speed signal walks the line to be as far as possible short. Must consider many speeds achieve several hundred MHz the DSP chips, needs to make the snake to wind thread (delay tune). This will elaborate with emphasis under wiring.
(2) digital-analog component layout
In the DSP system mostly is not the sole function electric circuit, has applied the CM0S digital component and the digital simulation mix component massively, must therefore count/the mold to separate the layout. The simulated signal component concentrates as far as possible, enables the simulation among to draw one in the entire digit independently to belong to the simulated signal region, avoids the digital signal to the simulated signal disturbance. Regarding some digital-analog mix component, if the D/A switch, in the tradition regards as it to simulate the component, places the simulation it ground, and provides a digital return route to it, lets the digital noise feed back the supply oscillator, reduces the digital noise to simulate the place the influence.
(3) clock’s layout
Regarding the clock, selects patches or strips of land as worth saving for seed with the main line signal, should be far away from the I/O line and the connector as far as possible. The DSP system’s clock input, very easy to receive the disturbance, is essential to its processing. Must guarantee throughout the clock producer approaches the DSP chip as far as possible, causes the clock line to be as far as possible short. Clock crystal oscillator’s outer covering best earth.
(4) decoupling layout
In order to reduce on the integrated circuit chip power source’s voltage instant overswing, adds the decoupling electric capacity to the integrated circuit chip, like this may remove on effectively the power source the burr influence, and reduces on PCB the power source ring circuit reflection. Adds the decoupling electric capacity to be possible the bypass to fall the integrated circuit component’s high frequency noise, but may also take the storage capacitor, provides and absorbs the integrated circuit switch gate instantaneous charging and discharging energy.
In the DSP system, to each integrated circuit imposition decoupling electric capacity, looks like DSP, SRAM, Flash and so on, increases between chip each power source and the place, moreover wants the special attention, the decoupling electric capacity to approach the power source to provide carries (source) and IC components foot (pin) as far as possible. The guarantee provides the end from the power source (the sotlrce end) and enters IC the electric current purity, and can let the noise as far as possible the way reduction. As shown in Figure 2, when processes the electric capacity, uses big Kong Huoduo a hole, and should be as far as possible short the hole to electric capacity between segment, be thick. 2 holes have been away from when is far, because the way is too big, is not good; Best is the decoupling electric capacity’s 2 holes has been nearer is better, may enable the noise to arrive by the most short-path.
Moreover adds on the high frequency electric capacity in the power source input end or battery power supply’s place is very advantageous. In the ordinary circumstances, to the decoupling electric capacity’s value is not very strict, generally presses C=l/, the computation, namely the frequency is when 10 MHz takes 0.1μF electric capacity.
(5) power source’s layout
When carries on the DSP system development, the power source needs to give careful consideration. Because some power source chip calorific capacity is very big, should first arrange to favor the radiation the position, must separate certain distance with other primary devices. May use adds the radiator fin or the shop copper carries on radiation processing under the component. The attention do not lay aside in the development board first floor gives off heat the module.
(6) other attentions
Should consider as far as possible regarding the DSP system other module’s layout the welding is convenient, debugging convenient and artistic and so on requests. Like to the potentiometer, the adjustable inductance coil, the variable condenser, dials the code switch and so on adjustable component to unify the overall construction laying aside. Regarding surpasses 15 g the components to reinforce decides the support to weld again, the special attention must keep the position which PCB the index hole and the steady rest take. The PCB edge’s primary device is away from to the PCB flange do not be smaller than generally 2 mm, PCB should better be the rectangle, the length and breadth ratio is 3:2 or 4; 3.
2.3 wiring designs
Increases the DSP system anti-jamming in the overall evaluation, after strengthening the EMC ability carries on the layout, the wiring must have some measures and the skill.
(1) DSP wiring
The wiring is on the whole starts from the core component, and launches take it as the center. Component which (Plastic Quad FIat Pack) or BGA (BaIl Grid Arrayr) seals regarding DSP this kind of PQFP, as shown in Figure 3, should first according to SRAM, Flash and the CPLD layout position judges roughly leaves the line direction, carries on the fan to the pin to leave the (fanout) operation. Specially regarding the QFP&BGA type’s component, the fan leaves appears especially important. Beginning the wiring starts, first makes the BGA type component’s pin the fan to leave, may for the following wiring saving of time, and may enhance the wiring the quality and the efficiency. When wiring, uses the EDA tool’s characteristic reasonably, for instance power PCB dynamicc rou-ting, may the most superior plan space. With dynamic time, this function will let between the line and the line space will maintain inside automatically the rule, will not waste the space, will reduce the following revision, will enhance the wiring the quality and the efficiency.
Must pay attention to the crosstalk and the serpentuate regarding high speed DSP (delay tune) walks line processing. Crawls line processing, as shown in Figure 4, may guarantee the signal the integrity, but must guarantee the high speed signal reference plane the continuity. In needs to do the plane divides, certain attention do not let the high speed line cross not continual plane; Must cross, adds the cross plane the electric capacity, as shown in Figure 5.
When holding wire (trace) is separated 3 time of signal line widths, between signal mutual crosstalk (coupling) probability only then about 25%, like this may achieve anti-electromagnetic interference (EMI) the request. Therefore, looks like CLK and SRAM these high speed holding wires, is sure to remember the holding wire is far away from above 3 time of widths with it nearby, adjusts and so on when is long, namely the snake walks the line, the line and the line width also takes above 3 time of signal line widths, including also takes 3 time of signal line widths regarding its holding wire. As shown in Figure 6, line width 5 mil*, winds thread the itself internal distance is 15mil, is bigger than is equal to 3 time of line widths.
(2) clock’s wiring
Regarding the clock signal, must enable it to walk the line regarding other signals to be away from as far as possible in a big way, guarantees in 4 time of line width above distances, and in clock (components) under do not walk the line; Regarding the analogue voltage input line, the reference voltage terminal and the I/0 holding wire is far away from the clock as far as possible.
(3) pair of system power source’s processing
The power source is in the system the most important part. Has assigned the independent power source level in the PCB stack-up design, but because a DSP system has many kinds of digit and the simulation component, like this uses the power source also has many kinds, therefore has carried on the division to the power source level, causes the same power source characteristic component division in the identical region, may nearby connect the power source level. But wants the special attention, carries on the division time must pay attention causes the reference supply plane the signal to be continual. Proved after the experiment, 40 mil line widths, may through the electric current can guarantee has l A; Regarding mosquito larvae L, has drilled the diameter is 16 mil may through 1 A electric current, therefore regarding the DSP system, the power line is bigger than 20 mil then. Needs to pay attention to the following several points regarding power line’s on electromagnetic radiation protection:
◆ limits on the circuit wafer with the shunt capacitor alternating current divulging;
◆ serially connects the syntype impedance coil on the power line (common modechoke), suppresses in the class warp the syntype electric current;
◆ the wiring approaches, reduces magnetism radiating area.
(4) docking place processing
In all EMC question, the subject matter is not the suitable earth causes. Grounding processing quality immediate influence system stable reliable. The earth has the following function:
◇ reduces in the output line syntype voltage VCM;
◇ reduces to the static electricity (ESD) sensitivity;
◇ reduces the electromagnetic radiation.
The high frequency digital circuit and the low frequency analogous circuit’s earth return cannot mix absolutely, must count/the mold to separate, because time digital circuit height electric potential cut has the noise in the power source and the place; If the horizon is not separated, the simulated signal still by the place noise jamming. Therefore should use the multi-spot series earth to the high frequency signal, overstrikees as far as possible reduces the grounding, like this besides reduces the pressure drop, reduces the coupling noise more importantly. But speaking of a system, regardless of how to divide, the final earth only then one, is only the draining way is different, therefore finally through magnetism bead or 0 n resistance, links the digit and the simulation in eliminates together the composite signal
Disturbance.
When the horizon divides, must guarantee the reference plane the continuity. Counts/the mold coexistent PCB board likely, if simulates the distance which the holding wire walks to be quite far, should as far as possible cause its reference backflow way also simulates the place. This means that must shear simulation place in the stratum along the simulated signal way, causes its reference simulation place, guarantees its reference plane the continuity.
(5) other matters needing attention
①When wiring, the wire corner do not walk 90° the broken line generally, reduces the high frequency signal foreign launch coupling.
②When to PCB shop copper, avoids using the big area copper foil as far as possible, otherwise undergoes the long time heating, easy to have the copper foil to fall off the phenomenon; Must use the big area copper foil time may use the grid substitution, like this is advantageous between the elimination copper foil and the foundation plate the bond heating produces the volatile gas. The (DIPPIN) shop’s copper foil should better also use thermit welding plate (thermal) on the penetration components foot to process; Should avoid the faulty soldered joint, enhances the nondefective rate, as shown in Figure 7.
③The input-output sideline should avoid being near parallel, avoids having the reflection disturbance; When necessity adds the grounding isolation. Two neighboring wiring must the mutually perpendicular, parallel easy have the coupling.
④Regarding I/0, should better be able to divide the respective reference plane zones of different, will cause the different I/O signal not to disturb, as shown in Figure 8.
Conclusion
This article through the disturbance which receives to the DSP system carries on the analysis first, discovers possibly has the disturbance primary cause, then in view of each kind of reason, uses the PCB board the stack-up type design, the component layout as well as the detailed wiring method, the disturbance which possibly produces the DSP system reduces from each aspect to is smallest. In the article each kind reduced the disturbance the method already to apply in the actual DSP system’s development (TI Corporation’s DSP chip TMS320LF2407), its effect was good.
