Abstract: The digital modulation demodulation technology holds the very important status in the digital communication, the digital communication technology and the FPGA union is a Communications Today system development inevitable trend. In the article introduced the MFSK modulation demodulation’s principle, and realized the MFSK tone circuit based on FPGA, the simulation result has indicated this design accuracy.
Key word: MFSK; FPGA; Modulation; Demodulation
The digital signal transmission system divides into the baseband transmission system and the frequency band transmission system. The frequency band transmission system is also called the digital modulation system. The digital modulation signal is called the keying waveform, what in the digital modulation process processes is the digital signal, but the carrier has the oscillation amplitude, the frequency and the phase 3 variables, and binary signal only then height level two logic quantities 1 and 0, therefore the modulation process available key modulation’s method by the baseband signal to the carrier frequency signal’s oscillation amplitude, the frequency and the phase carries on the modulation, the most essential method has 3 kinds: Quadrature amplitude modulation (QAM), frequency-shift keying (FSK), the phase-shift keying (PSK). basis processes the baseband signal enters the system to divide into the binary system and the multiple system modulation differently (M enters system). The multiple system digital modulation and the binary system compare, its frequency spectrum use factor is higher. This article studied (multifrequency keying) the tone circuit has realized the method based on FPGA MFSK, and has given under the MAX PLUSII environment simulation result.
1 MFSK synopsis
The MFSK system is 2FSK (two frequency key modulations) system’s promotion, this system has M different carrier frequency to be possible to supply the choice, each carrier frequency corresponds M to enter the system element information, namely represents the different digital signal separately with the many frequency different sine waves, in some element time only transmits a frequency. The MFSK signal may be represented as:
For the carrier angular frequency, usually uses the phase not continual oscilation frequency, like this is advantageous using the synthesizer provides the stable signaling frequency. Figure 1 is the MFSK system’s functional block diagram. In the transmitting end, the input binary element/and the transfer network transformation is M enters the system element after the logic circuit and the string, every k binary code divides into a group, uses for to choose the different sampling frequency. In receiving end, when some carrier frequency arrival, only then the corresponding frequency’s bandpass filter can receive the signal, other bandpass filter outputs is a noise. The sampling decision’s duty is in one time quite all envelope detector’s output voltage, carries on the decision through the choice maximum value. Obtains M the maximum value output to enter the system element, then, transforms Cheng Kwei again after the logic circuit the binary system parallel code, passes through and/the string transfer network again transforms the serial binary code, thus completes the demodulation process.
Figure 1 MFSK system principle diagram
2 MFSK tone circuit’s FPGA realizes
2.1 Based on FPGA MFSK tone circuit block diagram
Tone circuit block diagram as shown in Figure 2. The baseband signal/and transforms through the string obtains 2 bit parallel signal; Four choose a switch to act according to two bit parallel signal choice corresponding carrier output (in example M to take 4).
Figure 2 MFSK tone circuit block diagram
2.2 MFSK tone circuit VHDL procedure
The tone circuit VHDL essential code is as follows:
entity MFSK is
port (clk : in std_logic; –System clock
start : in std_logic; –Starts the modulation signal
x : in std_logic; –Baseband signal
y : out std_logic); –Modulation signal
end MFSK;
architecture behav of MFSK is
signal q: integer range 0 to 15; –Counter
signal f: std_logic_vector (3 downto 0); –Frequency divider
signal xx: std_logic_vector (1 downto 0); –Checks the input signal x 2 registers
signal yy: std_logic_vector (1 downto 0); –Checks xx signal the register
begin
process(clk) –This advancement has carried on the frequency division to clk, obtains 4 kind of intelligence signal f3, f2, f1, f0.
begin
if clk’event and clk=’1′ then
if start=’0′ then f<= ” 0000 “;
elsif f= ” 1111 ” then f<= ” 0000 “;
else f<=f 1;
end if;
end if;
end process;
process(clk) –X carries on the string to the input baseband signal/and transforms, obtains 2 bit parallel signal yy
begin
if clk’event and clk=’1′ then
if start=’0′ then q<=0;
elsif q=0 then q<=1; xx(1)<=x; yy<=xx;
elsif q=8 then q<=9; xx(0)<=x;
else q<=q 1;
end if;
end if;
end process;
process(clk, yy) –This advancement completes to inputs the baseband signal x MFSK modulation
begin
if clk’event and clk=’1′ then
if start=’0′ then y<=’0′; — the if sentence completes 2 position code parallel codes to 4 kind of carrier selections
elsif yy= ” 00 ” then y<=not f(3);
elsif yy= ” 01 ” then y<=not f(2);
elsif yy= ” 10 ” then y<=not f(1);
else y<=not f(0);
end if;
end if;
end process;
end behav;
2.3 Simulation result
Under MAX PLUSII environment’s simulation result as shown in Figure 3.
Figure 3 MFSK modulation procedure simulation result
Note: Intermediate signal yy and output modulation signal y corresponding relationships: “00″ =f3; “01″ =f2; “10″ =f1; “11″ =f0.
3 concluding remark
The multiple system digital modulation technology and the FPGA union enabled communications system’s performance to have the rapid enhancement. This article has realized the MFSK tone circuit part based on FPGA, as space is limited, to has not demodulated the part the electric circuit to carry on the discussion. In the practical application, definitely may integrates the modulation part and the demodulation partial electric circuits to a piece of FPGA chip, like this namely raised the FPGA internal structure use factor, may also reduce system’s cost.
Reference:
[1] Zhang Xueping, the king should live and so on. With realizes the [J]. micro computer information based on the FPGA OQPSK demodulator’s design, 2006, the 4-2nd issue: 155-157
[2] Huang Zhi the great .FPGA system design and practices the [M]. Beijing: Electronics industry publishing house, 2005
[3] Dong Zaiwang. Communication circuit principle [M]. Beijing: Higher education publishing house, 2002
