| Many systems use FPGA, ASIC or the DSP chip, these chip usual need many kinds of voltage circuits, are generally two kind of voltage circuits: Core nuclear power line ball road and I/O voltage circuit. The core nuclear voltage is lower than the I/O voltage generally. Determines on two kind of above voltage circuits the electricity method guiding principle, regards the component which and the Manufacturer you use decide. Shown in Figure 1 the first kind realizes the method, demonstrated how to realize the proportion to sort, i.e. two power source output line also starts, and simultaneously achieves the final stable output voltage. This kind realizes method use earth resistor R15, the red way and the part are deleted. So long as you pile up one on top of another many converters, shares one to start the capacitor softly, may realize in the proportion the electric work energy. This connection method guaranteed when on electricity two controllers simultaneously stir up rise the output voltage. IC1 and the IC2 two controllers use in common soft start capacitor C14. In this example has used two inner tube synchronization rectification FET voltage dropping converter. IC1 may use a 5V input voltage to produce 3.3V the I/O voltage, voltage dropping converter IC2 produces the 1.5V output voltage.
Two controller IC soft start pin has two functions. You may when the need uses for it to start the control circuit, realizes the way is meets a collecting electrode opening or the drain electrode opening gate on the SS foot. When transistor or FET breakover, pulls the SS foot to the place level, forces two controllers to be at the shutdown condition. When releases the SS foot, two controller IC uses its internal 5mA current supply to start to the C14 charge. The grand total has the 10mA electric current to flow in C14. Once C14 achieves 1.2V the threshold voltage, two controllers start to work. You may calculate the delay time very conveniently according to the capacitance value: The delay time is C14(1.2V/10mA). When output activation, before the exterior soft start speed is under the control, the internal soft start pitch will possibly present a short rise. Then the output voltage by with softly starts the speed rise which the electric capacity is proportional. You may carry on the programming through C14 to the soft starting time. The next formula is the soft starting time formula. The actual soft starting time is smaller than very possibly the approximate value which calculates, this is because the internal speed has the short rise reason. The soft starting time is C14 (0.7V/10 mA). If you adjust IC1 the 3.3V voltage, adjusts 1.5V IC2, then IC1 and IC2 simultaneously achieves the final voltage level. Figure 2 showed the measurement result which the proportion sorted. ![]() Figure 1, this electric circuit provides the proportion (deletion red way and part) or synchronized on electricity sorting. ![]() Figure 2, this graphical representation leaves the proportion to realize the method measurement result. In the synchronized sorting situation, IC2 plays master-control unit’s role. You may carry on the programming through R14 and R12 to the IC2 output voltage according to the 1.5V voltage, to is subordinated controller IC1 through R8 and R3 the output voltage to carry on the programming according to the 1.5V voltage. The situation which sorts with the proportion is the same, at the same time two voltages from the same pitch start, and simultaneously achieves the final voltage value. Once two voltage circuits achieve 1.5V, you must enhance the IC1 output voltage 3.3V, namely end value. Must achieve this point, Q1 must make R6 and R3 is parallel. The following three formulas use for to calculate R6 the resistance number. The known parameter is: VOUTCORE=1.5V, R8=27.4 kΩ, VREF=0.891V (IC1 internal band gap voltage reference), R3=40.2 kΩ. You may carry on the programming through R8 and RX to VOUTI/O. After RX is R3 and the R6 parallel resistance number. |
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