1 introduction
The image digitized expression causes the image signal to be possible to transmit high grade, and is advantageous for the image the retrieval, the analysis, processing and the memory. But digital image’s expression needs the massive data, must carry on the data compression. Even if used many kinds of methods to carry on the compression to the image data, its data quantity was still huge, to the transmission medium, the transmission method and storage medium’s request was high. Therefore, takes one of digital image processing key technologies, appears especially meaningful to the image compression coding technique’s research.
In the embedded microprocessor, DSP is famous by its algorithm crowded, especially qualify complex algorithm processing application. But needs to use in the digital video imagery processing system to the image real-time analysis, the compression, the decompression and so on massive processing operation, takes its embedded platform using DSP, may display its performance superiority, real-time meets the imagery processing needs.
2 stationary picture international compressed encoding standard JPEG
JPEG (Joint Photographic Experts Group) was International Standardization Organization (ISO) proposed in 1991 that the achievement faced the continual tone (including pessimistic and colored) the stationary picture code standard. The JPEG algorithm has defined 4 kind of movement patterns:
①Based on DCT along order pattern. According to carries on the scanning and the code from top to bottom from left to right, to the image, is called the basic system.
②Based on DCT increasing pattern. Refers to according to from thick ones to thin ones carries on the code to an image, suits is long in the transmission time, the user likes the image from the roughness to clear the application situation.
③Non-distorted code pattern. May guarantee that the reconstruction image and the primitive image are completely same.
④Lamination code. Carries on the code by each kind of resolution to the image, according to the different application request, may obtain the different resolution or the different quality image. This system uses the basic system model. Figure 1 and Figure 2 respectively is the JPEG code and the decoding block diagram.
3 hardware system design
This system design’s portable image compression board can hang directly in camera’s video frequency out-port, carries on gathering, the transformation and the code in the scene to the entire television signal, will process after the USB way the image data passes to the microcomputer again. System principle diagram as shown in Figure 3, take TI Corporation’s TMS320VC5402 digital signal processor as the core, including video frequency gathering electric circuit, expanded memory unit, expansion output port, SAA7110 control circuit, level switch electric circuit as well as USB electric circuit and so on.
In the system TMS320VC5402 is the central processor: SRAM is outside the DSP piece expands the data-carrier storage; EPROM is time the off-line working program memory, uses in memory system’s vectoring procedure and other application procedure; The frame memory uses in the primitive image which as well as the algorithm processing intermediate result saves gathers; The camera and the image A/D part is responsible to photograph the environmental image and to transform for the digital signal stores the frame memory; The address decoding, the image gathering systems control electric circuit produces this system various part of address decoding signal, causes it to map the different address region, and controls the image A/D switch to carry on image gathering.
3.1 video frequency gathering circuit design
Video signal’s gathering electric circuit are many, its key job method may divide into two kinds: Independent gathering law and processor gathering law. The former uses the special-purpose image gathering component, completes image gathering, the memory address production as well as the image data memory and refurbishing automatically, besides carries on the hypothesis to the gathering pattern, the processor does not participate in the gathering process, this method’s characteristic is gathers the process not to take CPU the time, timeliness, to suit the moving image well gathering, but the electric circuit is complex, the cost is low. But the latter uses the ordinary video frequency A/D switch and the frame memory realizes image gathering. The entire gathering process completes under the CPU control, starts A/D by CPU to transform, to read a/D transformation data, to store the data the frame memory and so on, its characteristic is takes CPU the time, timeliness to be bad, does not suit the video image real-time gathering, but the electric circuit is simple, the cost is low. This system uses the first kind of plan, namely gathers the electric circuit and so on is composed of special-purpose image gathering component SAA7110 and the corresponding external connection electric circuit.
Special-purpose video image codec encoder-decoder SAA7110 may provide 16 data interfaces, visits and controls the SAA7110 interior different register’s data through the I2C interface selection. Through this connection, establishes SAA7110 by 51 monolithic integrated circuits the active status and the image compression effect, like image total brightness, picture element greatest brightness and smallest information and so on brightness, tone processing, so that is the DSP adjustment compression effect provides the basis.
SAA7110 has 6 simulated signals the input channel, 2 8-bit the video frequency CMOS a/d conversion electric circuit, has the completely programmable static gain and the automatic gain control electric circuit, in view of PAL, NTSC and SE-CAM provides brightness, the tone signal processing, provides in the level and the vertical direction synchronized detection to all television signal standard, is the PAL service pattern provides the UV signal delay line to correct the tone phase error, provides 768/640 sampling on the YUV main line, supports 4:2:2 and 4:1:1 YUV output format in the 8-bit resolution, the user programmable beam control can rectify optics deviation effectively, uses 26.8 MHz crystal oscillators to all service pattern request; Simultaneously SAA7110 supplies the real-time status messages to output (RTCO), is the YUV main line provides brightness saturation of color (BCS) control.
3.2 USB transmission circuit design
The USB transmission circuit’s goal is the pictorial information which processes DSP carries on through the USB bus transfer to PC processing and the preservation. This system uses Philips Corporation’s ISP1581 the USB interface circuit, this component conforms to the USB2.0 standard, the data transfer rate achieves 480 Mb/s. Can satisfy the image data transmission request, simultaneously may through the main engine downward transmission instruction and the receive data. ISP1581 and the TMS320VC5402 correspondence realizes through a high speed general parallel interface.
The TMS320VC5402 exterior memory interface uses 16 bit data lines. ISP1581 may also dispose is 16 bit data line general processor connection pattern, therefore may the direct connection. ISP1581 only then 85 register units, use 8 address wires, may with the TMS320VC5402 address wire low 8 connections, use CSO to select patches or strips of land as worth saving for seed the space directly. Because ISP1581 relative TMS320VC5402 is the low speed equipment, therefore has used the READY connection signal in the application.
TMS320VC5402 has the rich I/O mouth resources, is very convenient with the ISP1581 control signal connection. In the design, chooses TMS320VC5402 GPIOF7 to produce the ISP1581 reset signal, when needs the ISP1581 replacement, produces a width is bigger than 500μs low level pulse. Uses GPIOF0 and GPIOF9 controls EOT and WAKEUP, carries out the corresponding function. TMS320VC5402 and ISP1581 and PC interface circuit as shown in Figure 4.
4 software system design
This system’s major function is to monitors the scene the entire television signal to carry on the real-time sampling, then carries on the code compression and to the image data transmits through the USB main line the image data for the main engine.
System’s master routine flow as shown in Figure 5, may divide into the initialization, image gathering, the compressed encoding and the data transmission 4 main modules.
On after system electricity or replacement, DSP before receiving main engine’s order according to default pattern execution image gathering and the code compression, after receiving the main engine order, according to order request execution image gathering and the code compression; In image gathering and in the compressed encoding process, DSP does not stop examines the main line, with the aim of discovering the main engine order correctly promptly. After DSP receives the main engine order, should transmit the image compression data as soon as possible, by reduces the standby period which as far as possible the host ridicules.
5 concluding remark
The practice proved: This system has the cost to be low, the programming is flexible and reliable higher merit. Moreover the compression board volume is small, is advantageous carries the installment, can complete the image compression well under the off-line state; Has obtained the very high imagery processing speed and the picture quality using TMS320VC5402; Has realized the image data high speed transmission using the USB2.0 technology.
