Abstract: K9K2GXXU0M is Tristar Corporation produces dodges large capacity saves the chip, its monolithic capacity may reach as high as 256M. In the article mainly introduced the K9K2GXXU0M characteristic, the base pin function and the operational order, showed with emphasis K9K2GXXU0M dodges each kind of active status which saves, and has given their work succession.
Key word: Dodges saves; K9K2GXXU0M; Large capacity Flash
Dodges saves (FLASH MEMORY twinkle memory) is one kind may carry on the electricity to scratch writes, and after power failure the information does not lose the memory, simultaneously this memory also has does not volatilize, the power loss lowly, 
to scratch writes the speed quickly and so on characteristics, thus may widely apply in the exterior memory domain, like personal computer and MP3, digital camera and so on. But along with dodges saves the application to be widespread gradually, to dodges saves the chip capacity the request to be also getting higher and higher, originally 32M, the 64M monolithic capacity already could not satisfy people’s request again. But the K9K2GXXX0M appearance exactly has made up this insufficiency. K9K2GXXX0M is at present monolithic capacity which Tristar Corporation develops biggest dodges saves the chip, its monolithic capacity reaches as high as 256M, meanwhile provides has the 8M extra capacity. Should dodge saves the chip is through increases the capacity with the non-cellular construction. The chip capacity’s enhancement has not weakened K9K2GXXX0M the function, it may in 400μs in complete page of 2112 bytes the programming operation, but may also complete the 128k byte in 2ms the cleaning operation, simultaneously in the data area’s data can by the 50ns/byte speed read-out.
K9K2GXXU0M dodges large capacity saves the chip the I/O mouth already to be possible to take the address the input end, may also take the data the input/out-port, meanwhile may take the instruction the input end. On the chip writes the controller to be able automatic control all programming and the cleaning operation, including provides the essential repetitive pulse, the internal confirmation and the data space and so on.
1 K9K2GXXU0M performance parameter
The K9K2GXXU0M main feature is as follows:
* uses the 3.3V power source;
* the chip internal memory cell array for (256M 8.192M) bit×8bit, the data register and the buffer storage is (2k 64) bit×8bit;
* has the instruction/address/data multiplying I/O mouth;
* in the power source switching process, its programming and the cleaning instruction may suspend;
* because uses the reliable CMOS migration gate technology, causes the chip to be possible to realize the 100kB programming/cleaning circulation most greatly, this technology may guarantee the data storage 10 years, but does not lose.
Table 1 arranges in order is K9K2GXXU0M dodges saves the chip the programming and the cleaning characteristic parameter. Between the table tCBSY longest time is decided in the internal programming completes with the data stores the gap.
Table 1 K9K2GXXU0M programming and cleaning characteristic
| Senate Number | Mark | Shortest | Model | Is longest | Unit | |
| Programming time | tPROG | 300 | 700 | μs | ||
| Buffer programming hypothesized busy time | tCBSY | 3 | 700 | μs | ||
| In identical page partial programming circulation | Main row | NOP | 4 | Cycle | ||
| Spatial row | 4 | Cycle | ||||
| Block erasing time | tBERS | 2 | 3 | ms | ||
2 K9K2GXXU0M base pin explanations
K9K2GXXU0M has 48 pins, its pin arrangement as shown in Figure 1. The concrete function is as follows:
I/O0~I/O7: Data feeds outlet, I/O mouth commonly used in instruction and address input as well as data input/output, data in reads in the process inputs. When the chip has not been selected or cannot output, the I/O mouth is in the high-impedance state.
CLE: The instruction lock saves the end, uses in activating the instruction to instruction register’s way, and in the WE rise along, and CLE is time the high level saves the instruction lock.
ALE: The address lock saves the end 熡 broom corn millet to boast せ wan 刂 returns to luck kuang Kang 刂fang mu mo jian Mu Fangding and in the WE rise along, and ALE is time the high level, the address lock saves.
CE: Selects patches or strips of land as worth saving for seed the end 熡 broom corn millet to lie 刂 rice dregs uncut jade Fu Nan≡ chi 5 vulgar uncut jade this Kappa hail 煟 to hope vast the high level is neglected, this time the equipment cannot return to the readiness condition.
RE: Reads enables the end, uses in the control data the continuous output, and delivers the data the I/O main line. When RE drop along, the output data are only then effective, simultaneously, it may also carry on the accumulation to the internal data address.
WE: Writes enables the control end, uses in controlling the I/O mouth the instruction to read, simultaneously, through this port may in the WE pulse rise along the instruction, the address and the data carries on the lock to save.
WP: Writes the protection end, through the WP end may, in the power source transforms carries on writes the protection. When WP is the low level, its internal high level generator will reposition.
Figure 3 programming operation succession chart
R/B: The ready/busy output, the R/B output can graphic display device’s operating status. When R/B is in the low level, indicated that has the programming, the cleaning or reads the operation to carry on stochastically. After the operation completes, R/the B self-recovery high level. Because this end is the drain electrode opening output, even if therefore, when the chip has not been selected or the output forbids, it will not be in the high-impedance state.
PRE: The circular telegram reads the operation, uses in controlling time the circular telegram to read the operation automatically, may realize the circular telegram the PRE termination to VCC to read the operation automatically.
* VCC: Chip power source end.
* VSS: Chip ground terminal.
* NC: Hanging.
3 K9K2GXXU0M bad blocks
Dodges saves with other solid memory can produce the bad block equally. The bad block contains or many invalid position blocks. The bad block does not affect the normal part in K9K2GXXU0M the work, this is because in K9K2GXXU0M, between each is the isolation. The bad block might find through the address arrangement system, but in K9K2GXXU0M the address was 00h must first certainly be normal. The bad block is also may scratch in the majority situations writes, once and is wiped off is impossible to restore. Therefore, the system must be able to act according to the bad block information to distinguish the bad block, and establishes the bad block information table through the flow chart, prevents the bad block information to clean.
In dodges in the use which saves, possibly will produce the new bad block, will thus cause the normal work to present some mistakes. After cleaning and the programming operation, if appears reads the defeat, must carry on the block replacement. The block replacement is page of buffers carries out by the capacity, may through discover may scratch the spatial block and carries on the programming to the current data object to make a round trip again in clamp dog’s remainder. In order to enhance the storage space the use efficiency, when causes by the single byte mistake when reads or the confirmation mistake, should by the ECC reclamation, but do not carry on any replacement.
4 K9K2GXXU0M active statuses
4.1 press the page to read the operation
The K9K2GXXU0M default condition to read the condition. Reads the operation is take writes through 4 address cycles the 00h address the instruction register as to start the instruction, once this instruction is locked saves, could not read in under page reads operates.
When address substitution, reads the operation to be possible stochastically to designate in the page 2112 byte data, in 25μs the memory enters in the data register. The system may through analyze R/the B foot to lose the judgment data to shift whether to complete. But the log data register’s data may read out very quickly, like a page of data may read out through the continual RE pulse in 50ns.
May through read in the random data output order to come from page of stochastically output data. The data address might from the data address which was going to output through the stochastic output order find the next address automatically. The random data output operation may use many times. Figure 2 gave read the operation the succession chart.
4.2 pages of programming
The K9K2GXXU0M programming is carries on according to the page, but it, in Shan Ye programs in the cycle to support many paging programming, but paging’s continual byte count is 2112. Reads in the page programming confirmation instruction (10h) then to start to program the operation, but before the written instruction (10h), must input the continuous data.
The continual loading data after reading in the continuous data input order (80h), will start 4 cyclical address inputs and the data loading, but the character is actually different with the programming data, it does not need to load. Chip support in page random input data, and may act according to the random data input order (85h) the automatic address substitution. The random data input may also use many times. Figure 3 is its programming operation succession chart.
4.3 buffer programming
The buffer programming is the page programming one kind, may carry out by 2112 byte data registers, and only in a block effective. Because K9K2GXXU0M has page of buffers, when therefore the data register enrolls in the memory element it may then carry out the continuous data input. Buffer programming only then, in has not completed the programming cycle ended, and the data register passed on the number after the buffer could start. Foot may judge through R/the B internal programs whether to complete. If the system only uses R/the B monitor routine the advancement, that the page of target program’s order must arrange last by the current page programming instruction. If arranges by the buffer programming instruction, the status byte must before the last program execution and the next operation starts to determine. Figure 4 is the buffer programming operation succession chart.
Figure 4 buffer programming succession chart
4.4 memory cell duplicate record
This function may rewrite page of effectively fast the data, but does not need to visit the exterior memory. Because consumes is visiting and in the reload time continuously is reduced, therefore the system will carry out ability to enhance. Especially when a block part promotes the part which is left over to need to duplicate when in the new block goes, its superiority obviously demonstrates. This operation is one carries out continuously reads the instruction, but does not use continuously to the destination address visit and the copy program. A primitive page address instruction is “35h ” reads the operation, may shift the entire 2112 bytes data to the internal data buffer. When chip returns ready state, will have the destination address circulation page duplication data feeds instruction to read. But in this operation’s faulty sequence by the condition will give “through/the defeat”. But, if this operation’s running time is excessively long, will cause the position operation mistake as a result of the data missing, will thus cause the nal error “the inspection/correction” the equipment check expiration. As a result of this reason, this operation should use two error correctings. Figure 5 has given the memory cell duplicate record operation succession chart.
4.5 cleanings
The K9K2GXXU0M cleaning operation is carries on take the block as the foundation. The block address loading will start from a block cleaning instruction, and completes in two circulations. In fact, when address wire A12~A17 is hanging, only then address wire A18~A28 available. Loads the cleaning confirmation instruction and the block address then starts to clean. This operation must carry on according to this order, in order to avoid in memory’s content receives the external noise the influence to present the cleaning mistake. Figure 6 is the block cleaning operation succession chart.
4.6 read the condition
In the K9K2GXXU0M condition register may confirm that programs and cleans operates whether to succeed completes. In written instruction (70h) after instruction register, will read the circulation along outputs the condition register’s content in CE or the RE drop I/O. But before the new instruction arrives, the instruction register will maintain reads the condition, if therefore condition register, in reads in the circulation to be at stochastically reads the condition, then before reading the circulation to start to give one to read the instruction.
Figure 5 and Figure 6
5 concluding remark
Because after dodging saves has the non-volatility, may the electricity scratch writes, the power failure, the data not to lose and so on characteristics, therefore obtains more and more widespread application. Meanwhile along with dodges saves the use widespread, is also getting higher and higher to its capacity’s request. But the K9K2GXXU0M appearance filled dodged large capacity saves the chip the blank. K9K2GXXU0M besides has the capacity big merit, may also in 400μs in complete page of 2112byte the programming operation, and may complete 128k byte in 2ms the cleaning operation, therefore K9K2GXXU0M is the present exterior memory domain one kind of very good memory chip.
