Author Email: cat_yuan@163.com
Abstract: The K9F6408 series is 8M×8bit NAND dodges the fast memory. It by its fast read-write circulation, the data hardware protection, may clean, I/O mouth order/address/characteristics and so on data line multiplying and connection convenience, are becoming large-scale system data and so on data like pronunciation, digital image, document carriers. This article has given K9F640800A and the monolithic integrated circuit P87C52 hardware junction circuit and dodges the software application procedure which the fast memory operates.
Key word: flash memory; Sector; Operation; Application procedure
1st, outline
The memory is the computer periphery product important component, has been experiencing ROM, PROM and EPROM and the present already to dodges the fast memory (Flash Memory) the time. The Flash memory by its low cost, the redundant reliable read-write, the non-volatility, may scratch writes the nature and the operation simple becomes the ideal media which a series of procedure code (application software) and the data (user file) saves, thus receives embedded system exploiter’s welcome.
The Flash memory’s application scope is extremely broad, from the modern computer superior plate the status which substitutes to the embedded system, it may be said that occupies loosely. Because the Flash application is just widespread, understands and grasps Flash the related operation and the managerial technique great importance. Mentions the Flash operation to include approximately: The error detection (to Flash interior bad sector’s examination), writes the operation (write data), to read the operation (from Flash readout), the spatial management and the cleaning operation. We select at87C52 monolithic integrated circuit in the system, it has 24 I/O mouths, 8 achievement have the special function I/O mouth, therefore only remains 16 I/O mouths to be possible to supply the general input/output use. We select the primary cause which K9F640800A dodges saves are it can save the I/O mouth, namely its address wire and the data line may the multiplying. But other many dodge the address wire which and the data line saves separates the use. Therefore, this article take SAMSUNG Corporation’s K9F640800A as an example, introduces Flash the operative technique.
2nd, K9F640800A chip performance characteristic:
· power line voltage: 2.7v~3.6v
· this chip capacity is 66Mbits, is composed of 1024, each is composed of 16 pages, a page altogether has (512 16) ×8bit. Uses 64Mbits, in addition has the 2Mbits idle storage space.
· writes and reads take the page as the unit, but cleans take the block as the unit. Reads, writes with the cleaning operation completes through the order, is convenient. (see also Figure 3)
· this chip may scratch writes 1,000,000 times, power failure the data not to lose, the data may preserve for ten years.
· has 8 serial bit mouths, and may the multiplying, both may take the address and the data input/output pin, and may make the order the input pin, uses the time sharing circulation according to the succession. (sees succession chart 5)
· reads in each page the time is 200us, writes a character to save 400ns every time equally, namely approximately 20Mb/s.
· this flash each sector divides into three areas (256 bytes, 256 bytes and 16 bytes), if needs to operate independently to these three areas, selects separately through 00h,01h and the 50h order. (see also Figure 3)
· fast read-write circulation and data hardware protection.
The pin distribution, the function and operational order as shown in Figure 1:
3rd, P87C52 and K9F6408U0A application electric circuit
We have designed a system, must realize the function is, will receive the GPS chip transmission data from the P87C52 monolithic integrated circuit, after certain form processing, saves to the Flash chip on. When the superior machine sends out reads the order, P87C52 again from flash takes out the data, issues the superior machine. Here, we have given the K9F6408U0A flash chip and the P87C52 monolithic integrated circuit connection diagram (Figure 2).
4th, K9F6408U0A software programming
The K9F6408U0A software programming is uses in the C language to insert the assembly to complete. Mainly includes: the flash sector error detection, reads, writes, cleans and manages the flash space.
1) detectes error: Just left the plant in Flash possibly has the bad sector, also possibly goes bad with the long Flash good sector. In order to guarantee that the read-write data the reliability, must carry on the examination to the Flash sector. The Flash sector’s quality symbolized that exists in the 3rd area 6th Column, if the sector has been bad, then the symbol bit data are not FFH. Establishes a wrong sector the table, the scanning detectes error flash, fills in turn the table the bad sector’s number, this table preservation in the flash memory’s first block (, because SAMSUNG guarantees the first block to be able correct use). Flow chart (Figure four):
2) reads flash:Flash to divide three areas, orders 0X00,0X01 and 0X50 may read first, second, in the third area data separately.
The process is: Selects Flash, reads in through the I/O mouth reads the order character, reads in reads the data address, sets reads the signal effectively (next to jump effectively along).
(read-write) the succession chart is as follows:
The concrete program is as follows:
void FlashRead()
{
unsigned char d;
Flash_CE=0; file:// selects patches or strips of land as worth saving for seed
WriteCommand(0×00); file:// writes the order which reads
WriteAddress(0×00,0); file:// writes the address which reads
for (d=0; d! =2; d ) file:// one time reads two pages
{
uint k=528; file:// each sector has 528 bytes
while (! Flash_RB) //, when reads the signal is invalid, waiting
{
}
when the while(k) file:// k is not 0, following reads; Otherwise stops reading
{
Flash_RD=0; file:// prepares to read in
#pragma asm file:// inserts the assembly, inserts 2 machine cycles
NOP
NOP
#pragma endasm//conclusion assembly
ACC=P0; file:// stores the P0 mouth read-out’s value the ACC register
#pragma the asm//inserting assembly, inserts 2 machine cycles
NOP
NOP
#pragma endasm//conclusion assembly
Flash_RD=1; file:// no longer reads in
SendData(); file:// serial port transmission data
k–;
}
}
Flash_CE=1; file:// no longer selects patches or strips of land as worth saving for seed
}
3) writes flash: What with reads the operation not to be dissimilar, writes the operation to have two order characters: 0X80 and 0X10, after reading in 0X80, will express to the register in the write data, if will enter in 0X10 Flash again the controller register’s data storage to the data-carrier storage. When writes the operation, will want the write data the address and the wrong sector commends the comparison, looked whether in table. If in the table, adds the page pointer address 16 (i.e. trades in next Block), compares again, the cycle operation until did not find in the table address. The address which writes by this guarantee is the actual address. Concrete process: Selects Flash, reads in through the I/O mouth writes the order character, reads in must program the data address, sets writes a letter the number to be effective. (writes the succession to see Figure five
*unsignedchar AssertBlock (unsigned char a) // commends the comparison with the record bad block the subroutine
{
unsigned char i=0;
while (i! =invalidblockbound 1) // invalidblockbound is the invalid block total
{
while (a! =*InvalidBlockAddress ) //, when traversal to the last invalid block, continues to check
{
i ;
}
}
if (i! =invalidblockbound 2)
return 1; // invalid block
else
return 0; // effective block
}
void Write(void)//writes the operation
{
unsigned char h;
when if(first)//starts carries on to a page writes the operation, first=1, otherwise is 0
{
Flash_CE=0; file:// selects patches or strips of land as worth saving for seed
WriteCommand(0×80); file:// writes orders 0×80
The *uchar AssertBlock(startpage/16) file:// and the record bad block commends the comparison
WriteAddress(0×00, startpage); file:// writes the address
first=0;
}
for (h=0; h! =16; h )
WriteData(output[h]); file:// reads in the GPS data which the register processes
when if(FlagWrite)//in register data full 528 bytes (1 page), FlagWrite=1, otherwise is 0
{
WriteCommand(0×10); // reads in the data flash
while (! Flash_RB) file:// waited for that reads the signal to be effective
{
}
WriteCommand(0×70); file:// reads the condition quantity
Delay10us();
Flash_RD=0; file:// prepares to read in
#pragma the asm//inserting assembly, inserts two machine cycles
nop
nop
#pragma endasm//conclusion assembly
ACC=P0;
ACC=ACC&0×01;
Flash_RD=1;
if (ACC! =0) if file:// last is not zero
{
* (InvalidBlockAddress j)=startpage/16; file:// saves the invalid block space the first address
startpage=startpage 16; file:// reads the next block the first sector to look whether is the effective sector
}
Flash_CE=1; file:// finished selects patches or strips of land as worth saving for seed
startpage ; file:// writes down a page
first=1;
}
}
4) cleans: Carries on the cleaning take the block as the unit. Around has two erase commands to guarantee cannot by the accident cleaning.
void FlashErase (uint a)
{
unsigned int blockcount;
Flash_CE=0; // selects patches or strips of land as worth saving for seed
for (blockcount=0; blockcount! =a; blockcount ) // seeks the block which cleans
{
WriteCommand(0×60); // cleaning preparatory command command
WriteAddresspage(16*blockcount);
WriteCommand(0xD0); // cleaning confirmation order
while (Flash_RB! =1)
{
}
WriteCommand(0×70); // reads the cleaning condition order
Delay10us();
Flash_RD=0;
#pragma the asm//inserting assembly, inserts 3 machine cycles
nop
nop
nop
#pragma endasm//conclusion assembly
ACC=P0;
#pragma the asm//inserting assembly, inserts 1 machine cycle
nop
#pragma endasm//conclusion assembly
Flash_RD=1;
ACC=ACC&0×01;
if (ACC! =0) // cleaning defeat
{
*InvalidBlockAddress=blockcount; // record bad block
InvalidBlockAddress ;
j ;
}
}
Flash_CE=1; // no longer selects patches or strips of land as worth saving for seed
}
5) flash management: Mainly includes the record invalid block, the flash space examination as well as the spatial reorganization. (in this take flash reorganization flow chart as example)
(1) starts the flash collate program; (2) scans entire physical space, obtains the sector which uses to count N; (3) the sector which uses read from ith, initialization i=1; (4) looks at the sector the address whether continuously; (5), if goes study the next sector continuously, if read last sector which used to finish; (6), if were not last already the sector which used, jumped to the step (3); (7), if the physical sector is not continual, then obtains this sector in the block k address pointer; (8) scans idle block j and obtains its address pointer; (9) all has written k in the sector to move to j, cleaning block k; (10) cleans effectively (11), if invalid records this block for the invalid block, and carries on (12) the step; (12), if effective has judged reads the last sector? (13), if has not jumped to the step (3); (14), if last has written the sector, then conclusion collate program.
