Abstract: MAX8529 is a section of new 1.5MHz two-circuit voltage dropping controller which American Maxim Corporation promotes, this chip has the synchronized two-circuit 180℃ out of phase operating function, and is very low in the DSL frequency band’s output noise, especially is suitable in the xDSL modem. In the article introduced the MAX8529 performance and the characteristic, and elaborate in the MAX8529 application electric circuit’s related design requirements.
Key word: MAX8529; 180℃ out of phase; Electromagnetic interference (EMI); SYNC
1 outline
MAX8529 is a section of new 1.5MHz voltage dropping controller which American Maxim Corporation promotes, in this chip’s two independent regulators are by 180°C the out of phase operation, thus reduced the input filter request, reduced EMI, improved the efficiency, simultaneously also effectively reduced part’s loss, has saved the circuit wafer space. Moreover, this chip also has the low loss, the volume small merit, moreover is very low in the DSL frequency band’s output noise. MAX8529 main application in xDSL aspects and so on modem, wide band router, DSP, ASIC and FPGA power source.
MAX8529 takes the electroresponse component using the MOSFET low side’s resistance, thus has omitted the electroresponse resistance, this causes the DC-DC structure when the output overloads or the output short circuit is exempt from the damage. In short circuit period, may through the modifying feedback electric current threshold throttle closure loss. Because MAX8529 contains a on electricity replacement output, thus may when two outputs achieve the adjustment threshold sends out the reset signal to the system. The MAX8529 main feature is as follows:
* when DSL frequency band work, the output noise is very low;
* may use the ceramic electric capacity to work for the input/output capacity;
* can simultaneously carry on the voltage dropping operation or the pressure-rise/voltage dropping operation;
* has four outputs as well as 90℃ the phase output (with two MAX8529);
* has the feedback current limitation function;
* the input voltage is 4.75V~23V;
* the output voltage is 0V~18V (achieves 6A);
* the efficiency is bigger than 90%;
* uses the fixed frequency to carry on the PWM operation;
* has 600kHz~1.5MHz to be possible to adjust the turn-on frequency;
* has the exterior SYNC input;
* has the main/auxiliary electric circuit synchronization clock to output;
* has the soft start and the soft stop function;
●RST the output detention minimum is 140ms;
* has consumes the current limitation lossless (non inductive resistance) the function;
* uses the 24-QSOP seal;
* operating temperature for - 40~ 85℃ (MAX8529EEG).
Figure 1
2 MAX8529 internal functions and pin explanation
2.1 MAX8529 internal structures
MAX8529 internal structure diagram as shown in Figure 1, it by the PWM comparator, the pitch regulator, the oscillator, the 5V linear regulator, starts parts softly and so on DAC and undervoltage locking is composed. This controller may obtain two outputs from the 4.75V~23V input, and each output may carry on the adjustment in the 1V~18V scope. May reduce the input voltage ripple and the total RMS input current ripple using the synchronized 180°C out of phase output operation. Available non-essential resistance regulating cock frequency (600k~1.5MHz). If realizes two elects one, the controller may the external clock which or a system clock synchronization produces with another MAX8529. MAX8529 can produce a synchronism or 90℃ the phase difference output, because the synchronized clock signal may provide generally by another controller, therefore, two controllers may two intersections for the operation, may also the four-phase (each phase-shift 90℃) operate. Moreover, this equipment also has the soft start and the soft stop function.
The MAX8529 voltage dropping converter may for every one output provides a PWM voltage mode control (e.g. Figure 1), as a result of it already may through the internal neterodyne frequency division, may also actuate the SYNC input by the external clock to produce the clock signal, therefore, each controller’s turn-on frequency is equal to the oscilation frequency half (fSW=fOSC/2). In addition, the internal transconductance error amplifier may produce the complete error voltage in the COMP end, may also provide the high accuracy the DC output. Available PWM comparator and pitch generator in COMP end definite dutyfactor. In each clock’s rise along, REG1 Gao Ce the MOSFET connection, and maintains this condition, until achieves the suitable dutyfactor or the biggest dutyfactor. But second leans high MOSFET (REG2) in clock’s drop along the connection. Leans high in each MOSFET on period, corresponding induced current pitch rise.
In the switching period’s second half period, leans high the MOSFET closure, leans lowly the MOSFET connection, the induced current pitch drops, the energy liberation and provides the output current. In overloads in the situation, when the induced current surpasses the choice the valley electric current threshold, in the corresponding clock border, leaned high MOSFET still not the breakover, but leaned MOSFET maintains lowly the breakover causes the induced current to continue to drop.
2.2 MAX8529 pin explanation
MAX8529 pin arrangement as shown in Figure 2, various pins’ function is as follows:
1,12 feet (COMP2, COMP1): Respectively be regulator 2, 1 compensation ends;
2,11 feet (FB2, FB1): Respectively is the regulator 2, 1 feedback input ends, these two pins meet separately in REG2, REG1 to a GND between resistance divider, may use in adjusting the output voltage (1V~18V).
3,10 feet (ILIM2, ILIM1): Respectively is the regulator 2, 1 current limiting adjustment end. If connects ILIM2, ILIM1 separately to VL, that PGND-LX2, the PGND-LX1 current limiting threshold default value is 100mA. In ILIM2, connects resistance RILIM2 and RILIM1 separately the ILIM1 end to GND, then may REG2, REG1 current limiting threshold VITH2 and VITH1 transfers to 50mV (RILIM2=100kΩ) to 300mV (RILIM2=600kΩ).
4 feet (OSC): Vibrates the input end. Because the controller produces the clock signal through the oscillator frequency division, therefore the turn-on frequency is equal to the synchronizing frequency half (fSW=fOSC/2). Connects resistance ROSC in OSC to GND, may produce the 600kHz 煟 remote Greece cherry vast sword to guarantee the Egyptian shuttlecock luck 牎 1500kHz 煟 remote Greece cherry vast sword towering shuttlecock luck 牭 item of pass frequency. When connects an external clock to SYNC, the controller still requested to have ROSC, moreover chooses ROSC to satisfy SYNC half the input.
5 feet (V ): Input supply voltage (4.75V~23V).
6 feet (REF): 2V reference output. When use should 0.22μF or the bigger ceramic electric capacity connects GND through one.
7 feet (GND): Simulation place.
8 feet (CKO): Exterior the clock outputs, uses in 2 or 4 phase synchronism clocks outputs.
9 feet (SYNC): Perhaps the synchronization may choose the clock input. SYNC has three kind of operator schemata, connects SYNC to be possible to carry on the exterior synchronization to a 1200kHz~2800kHz clock; Connects SYNC to be possible to take a master-control unit to GND 2 to operate; Connects SYNC to be possible to take a master-control unit to VL 4 to operate.
Figure 3
13 foot (RST): On electricity replacement end. When two output voltages are lower than adjusts above 0.10%, RST is the low electric potential. After the system completes the soft start, two output voltages surpass the normal output voltage (VFB->0.9V) 90%, that the system later will become in a 140ms detention RST the high-resistance condition, and when two outputs maintain is stable maintain the high-resistance condition. Connects a resistance in RST and between the logical input to be possible to have the logic level.
14,23 feet (DH1, DH2): Respectively is regulator 1/2 Gao Ce the grid driver out-port, DH1 generally changes between LX1 and BST1, but DH2 usually changes between LX2 and BST2.
15,22 feet (LX1, LX2): Respectively is the regulator 1/2 exterior sensor coupling end, may connect separately LX1/LX2 the sensor the switch end, with the aim of causing LX1, LX2 to take the low input source to actuate DH1, DH2 Gao Cezha the driver.
16,21 feet (BST1, BST2): When respectively is the regulator 1/2 pressure-rise fast electric capacity coupling end, the design, to the LX2 end should connect an exterior ceramic electric capacity separately in BST1 to the LX1 end and BST2.
17,20 feet (DL1, DL2): Respectively is the regulator 1/2 low side grid driver out-port, DL1, the DL2 output voltage generally changes between PGND and VL.
18 feet (PGND): Power source place.
19 feet (VL): Internal 5V linear regulator out-port.
24 feet (EN): The high level enables the end. When this end for logical low level, in electric circuit’s two controllers will be shut down. But works as when this end connection to VL, the operation has maintained.
Figure 4
3 MAX8529 application electric circuits
MAX8529 application electric circuit as shown in Figure 3. The MAX8529 all function’s energy comes from declines lowly the 5V regulator. The regulator biggest input voltage (V ) is 23V, the output (VL) receives a 4.7μF ceramic electric capacity to PGND between. Because the VL decline voltage nominal value is 500mV, therefore, when the V value is bigger than 5.5V, VL is 5V. But when VL is lower than 4.5V, the undervoltage locking circuit will lock two regulators. The VL linear regulator can output the 50mA above electric current to give IC, drove that the low side grid driver charges for the exterior boost capacitor as well as supplies the small external load.
The high side switching valve’s grid slaving voltage is provides by the fast electric capacity boosted circuit (please do see also shown in Figure 3 electric circuit). After start, the electric capacity will charge 5V, in the second alternation, leans lowly the MOSFET closure, and closes BST- and a DH- internal switch, simultaneously puts through leans high the MOSFET tube.
SYNC has two functions: One is the synchronization the clock which chooses from the controller outputs (CKO); Another is causes the clock input and the MAX8529 external clock signal maintains a synchronization. Therefore, MAX8529 has main, from the controller two kind of functions. The CKO function is provides a synchronized the clock signal to take MAX8529 the turn-on frequency, it may maintain with controller’s synchronized signal the synchronism (SYNC=GND) 熞 the tree top mixed school stem Chang bridle fools ǎ cherry Ni danger vast sword Zheng ta. MAX8529 may provide three kind of control models are as follows:
First, when SYNC meets GND, CKO output frequency and REG1 turn-on frequency (fCKO=fDH1) equal, moreover two signal synchronisms, by now, if this signal and from controller synchronization, then may provide 2 operates.
Second, when SYNC meets VL, the CKO output frequency was equal to REG1 turn-on frequency two times (fCKO=2fDH1), this time two signal phase difference 90℃, like this, system signal when with from controller synchronization, may provide 4 operates.
Third when actuates SYNC by the exterior oscillator, obviously the SYNC input signal carries on 2 frequency divisions to produce controller’s clock (fSW=fSYNC/2), this time, the REG1 periodic transformation along will carry on the internal clock signal’s rise, fCKO=fDH1, and synchronism. But still needed ROSC by now, but this time’s internal oscilation frequency for synchronizing frequency half (fOSC=fSYNC/2).
4 concluding remark
Because the MAX8529 interior’s two independent regulators have used the synchronization 180℃ the out of phase operation output, thus compares with the traditional synchronism output, it to input filter’s request to reduce, EMI reduced, simultaneously the efficiency also greatly enhanced, in addition reduced part’s loss, has saved the circuit wafer space. Especially in the DSL frequency band, its output noise is very low, therefore in xDSL domains and so on modem, wide band router, DSP, ASIC and FPGA power source obtained the widespread application.
