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    Abstract: RAMTRON Corporation produces parallel interface high performance poss ferroelectric random access memory FM1808 is the NV-SRAM ideal substitution product. In the article introduced the FM1808 performance characteristic, the pin function and the principle of work, simultaneously with emphasis introduced poss ferroelectric random access memory’s application characteristic and with other type memory’s between application difference, has given the FM1808 design application main point.

    Key word: FRAM; Parallel interface; Poss ferroelectric random access memory; FM1808

1 introduction

At present, the data reads in the frequency to request to compare Gao Qie to request the power failure obliterated data the application domain, usually uses the interior to have the lithium battery not to volatilize the NV-SRAM achievement to save the component, but this kind of component expensive price has restricted it in the price sensitive domain application, but if uses with its compatible poss ferroelectric random access memory FRAM, then may solve the cost problem well, simultaneously may obtain the higher data storage reliability. The poss ferroelectric random access memory is the RAMTRON Corporation’s proprietary product, this product’s core technologies is the ferroelectricity crystal material, this exotic material enables the poss ferroelectric random access memory product simultaneously to have the stochastic memory (RAM) and the nonvolatile storage (ROM) the product characteristic. FM1808 is based on the poss ferroelectric random access memory principle manufacture parallel interface 256kbit poss ferroelectric random access memory, this memory compares other types the memory to have three major characteristics:

* may look like RAM nearly such to read in without the time limit;

* may read in along with the main line speed does not need any to write the standby period;

* ultra low power loss.

This kind of poss ferroelectric random access memory FRAM has overcome formerly EEPROM and the FLASH write time long, scratches writes the number of times few shortcomings, its price does not volatilize lithium electricity NV-SRAM compared to the same capacity lowly many, thus may widely apply in after the system power failure needs the reliable save routine and the data application domain, simultaneously is also the price expensive does not volatilize lithium electricity NV-SRAM the ideal substitution product.

2 performance characteristics and pin definition

The FM1808 principal characteristic is as follows:

* uses the advanced ferroelectricity technology manufacture;

* the storage capacity is 256k bit (i.e. 32k byte);

* the read-write life is 10,000,000,000 times;

* the power failure data may preserve for 10 years;

* writes the data not to have the time delay;

* the access time is 70ns;

* the low power loss, the operating current is 25mA, waits for an opportunity the electric current is only 20μA;

* uses the list 5V working voltage;

* operating temperature scope for - 40℃~ 85℃;

* has specially fine against moist, against electric shock and the earthquake resistance performance;

* and SRAM or the parallel E2PROM base pin is compatible.

FM1808 uses 28 foot PDIP and the SOIC seal form. Figure 1 has given its SOIC seal pin arrangement, various pins function showed that see Table 1 to arrange in order.

3 FM1808 principle of work

FM1808 has 10,000,000,000 time read-write life, it must be much higher than other type’s memory read-write life. For all this, its read-write life is also limited, if has the understanding to the FM1808 principle of work and the internal structure, when use may act according to its unique feature reasonable use memory cell to lengthen its read-write life.

3.1 memory’s structures and read-write life

FRAM may provide other nonvolatile storages is much higher than writes the durability, however to a certain extent, the memory access will increase will cause the FRAM operation to make a mistake probability increase, namely write store’s data will lose, but memory’s content actually still might read out normally, certainly above phenomenon only then after the memory read-write number of times will achieve 10,000,000,000 times only will then appear, therefore, to lengthen memory’s read-write life, may act according to the data read-write the frequent degree, will carry on the read-write operation the data storage in the different region, for example to some key’s data like system disposition parameter and so on, may place in access few regions, butWill change the data which the frequent data or does not need to preserve for a long time to place in the independent region, like this both may the guarantee system essential data storage security, and may guarantee that the non-safe area memory’s reality scratches writes the number of times to be bigger than 10,000,000,000 times, thus extension poss ferroelectric random access memory’s physical life.

Poss ferroelectric random access memory’s particularity lies in each time reads the operation to be able to destroy the original data, must therefore after completing reads the operation carries out one to return again writes the process, like this, carries out one time to read the operation every time, similarly will reduce a read-write life, to maximum limit increase memory’s service life, simultaneously will not hinder the user use the flexibility, the FM1808 usual use unique memory to organize.

FM1808 internal structure diagram as shown in Figure 2. In the chart, the FM1808 32kbyte memory array by the division is 32, each is 1k×8, this 1k×8 each block including 256 lines and 4 rows, address wire A0~A7 to line of choice decoding, A8~A9 to row choice decoding, because will visit a itinerant to reduce one time every time the life, therefore, will use this kind of arrangement plan to be possible to carry on the cyclical read-write evenly very easily in a block, for example 256 byte’s data will not need two visit identical lines then by the smooth visit, but complete 1k×8 is read or writes only needs 4 cycles, Figure 3 has given in FM1808 a 1k×8 memoryBlock structure drawing (memory block 4).

FM1808 uses a10~A14 top digit address wire to choose 32 different memory blocks, because memory each line cannot surpass the block the boundary, therefore the read-write operation frequency different data should place in the different block.

3.2 read the operation

FM1808 function truth table as shown in Table 2.

Table 2 FM1808 function truth table

Reads the operation to drop generally in CE along the start, by now the address position was locked saves, the memory read cycle starts, once starts, should cause CE maintains invariable, a complete memory cycle may complete in the interior, after the access time had ended, on main line’s data becomes effectively.

After the address is locked saves, the address value may satisfiedly maintain the time parameter in the foundation occurs the change, this point does not look like SRAM, after the address locks saves, the alter address value will not be affected memory’s operation.

3.3 write the operation

FM1808 writes with reads usually occurs in the same time gap, FM1808 writes the operation by CE and the WE control, the address saves in the CE drop along the lock. When the CE control writes the operation, WE in starts 0th write cycle pretage, namely, when CE is effective, WE should be the low level first. FRAM has not written the time delay, reads with writes the access time is consistent, the entire memory operation appears generally in a bus cycle. Therefore, any operation can after writes the operation carries on immediately, but does not look like E2PROM to need through the judgment to determine that writes operates whether to complete.

3.4 charge operations

The pre-charge operation prepares a new reference to storage’s internal condition, all memory cycle including a memory visit and a pre-charge, pre-charge when the CE foot or is invalid for the high level starts, it must maintain the high level at least for the smallest pre-duration of charging, as a result of the pre-charge in the CE rise along the start, this causes the user to be possible to decide that the operation the start, simultaneously this component has CE is the greatest time standard which the low level must satisfy.

4 FM1808 designs and application main point

FM1808 base pin arrangement and SRAM 62256 compatible, it and use parallel SRAM and NV-SRAM are equally convenient, but should also note between FM1808 and SRAM and the NV-SRAM difference. FM1808 saves each address in the drop along the lock, like this permits after each reference to storage, the alter address main line, simultaneously dropped in CE along the lock saves each address, Figure 4 has given FM1808 and the SRAM memory visit succession contrast.

    May see by Figure 4: FM1808 each visit must guarantee that CE jump from high to low, this is FM1808 and the SRAM only difference, CE each time visits must select the address the reason to have two; first, must lock saves the new address; second, when CE is the high level, establishes the poss ferroelectric random access memory to the pre-charge, therefore, in application design time must change CE the selection way, guarantees in the succession meets the FM1808 reference to storage’s needs, meanwhile should pay attention to the memory addressing space and the CE succession compatibility. Here gives take the MCS-51 monolithic integrated circuit as the example solves this question method, because MCS-51 monolithic integrated circuit’s ALE pin saves the permission signal for the address lock, therefore, visits time the monolithic integrated circuit exterior memory, this foot will output negative jumps along the pulse to use in the lock saving 16 bit addresses low 8. Because visits one time the exterior data-carrier storage every time, this pulse will appear one time, therefore may visit one time using the ALE signal to change one cyclical every time the characteristic. ALE and FM1808 select patches or strips of land as worth saving for seed signal P2.7 or then obtain the FM1808 request visit succession. At89C52 monolithic integrated circuit and FM1808 hardware connection as shown in Figure 4. Besides succession coordination, FM1808 when application should also pay attention to questions and so on power source, piecemeal as well as service life.

4.1 power source monitorings

When uses SRAM adds the reserve battery’s way stored datum, for can in the power failure time cuts for the battery power supply, but must monitor the supply voltage, simultaneously to reduce the battery loss, after power failure, the user does not allow to visit SRAM, like this, the user suddenly possibly will not be having the warning or in the prompt situation power failure is unable the reference to storage. But the FRAM memory does not need the above power source supervisory system, the FRAM memory will not be terminated under any supply voltage the visit, certainly to data secure request very high application situation, when the power source will drop to certain value, may prevent the processor reference to storage to enhance the data storage the security.

4.2 piecemeal uses

May know by the front memory principle, FM1808 is divided into the interior 32 blocks, each is the 1k byte, when application besides should pay attention according to the data accessing frequent degree divides into the fixed data area and the temporary data area, but should also pay attention to the data depositing also to the piecemeal use, namely has the relation data to around to deposit in FM1808 in line or in a block, because FM1808 is (256 bytes) calculates by a read-write line one time scratches writes, therefore, if is connected the data is stored in the different line or, then time read-write data manipulation onMust cut the different line or the block frequently, will like this reduce its normal storage lifetime.

Figure 5

    4.3 service lives

Although poss ferroelectric random access memory’s life is limited, and reads or writes the operation to be able to affect its read-write life, but the FM1808 memory has 10,000,000,000 time read-write life, even if is each second carries on 30 read-write, when the read-write life must take 10 year at the appointed time, therefore to the data read-write operation frequency is not the specially high application situation generally, but does not need to consider its read-write life specially.

5 concluding remark

The FM1808 poss ferroelectric random access memory both has RAM to read in the characteristic fast, and has the ROM non-volatility, therefore, is more widespread than E2PROM which the present stage, ISP FLASH and the lithium battery uses does not volatilize NV-SRAM to have the superiority, is also precisely because it has these characteristics, this component may widely apply to the data storage security and the reliable request extremely high application situation, like the entrance guard checking attendance system, the survey and the medical measuring appliance, the non-contact smart card, the tax control application situations and so on cash register, pre-payment electric meter or duplicate tariff electric meter and water meter, gas meter. Simultaneously this component and the higher data storage reliability becomes NV-SRAM by it relatively inexpensive price the ideal substitution product, this type memory will obtain more and more widespread application in the high authentic data memory domain.