Abstract: In the state of the water automatic measuring and reporting system, requests the central station and each group terminal sharing telemetered data frequently, for this reason used TI Corporation’s 4 channel asynchronous transceiver integration chip TL16C554 to carry on the serial port for AT89S8252 to expand, realizes the central station and various terminals multi-channel data receives and the transmission.
Key word: Central station multi-channel data TL16C554 asynchronous serial communication
1 introduction
The state of the water automatic measuring and reporting system generally by the central station, the relay station and the telemetering station is composed. The state of the water automatic measuring and reporting system’s central station uses for receives the telemetering station (or after relay station repeater) the data and carries on the demodulation, the memory and processing, realizes the flood prevention through the database and the application software to dispatch the demand. And the central station generally by the receiving antenna, the feed line, the arrester, the wireless receiver (broadcasting station), the decoder, the industrial control computer (or PC) is composed.
For satisfied telemetering external guidance system central station’s and so on state of the water, urban flood prevention computer monitoring data exchange’s needs, request several terminal sharing telemetered data frequently, namely request central station gain data information through wireless or wired channel, transmits to each shared data terminal, but each terminal may also carry on the data exchange with the central station. What is most commonly used selects the asynchronous serial communication method, realizes the central station and various terminals multi-channel data receives and the transmission.
2 system designs
2.1 TL16C554
In the asynchronous serial communication, requests equipment’s serial port to generally conform to RS-232, RS-485 and so on serial communication standard, and carries on the message control and the data transmission according to this standard definition’s signal, can realize this function integrated circuit usually to be called UART, namely general asynchronous receiver/transmitter. Constitutes using At89s8252 main from the type many machine serial communication systems when discovered that main engine At89s8252 must at the same time with from machine the communication, on the other hand must with the terminal communication, this time then have the necessity to carry on the serial port to expand, simultaneously are many from machine to have at the same time the possibility with the main engine transmission data, this time uses 4 channel asynchronous transceiver TL16C554 is one kind of good choice obviously.
TL16C554 is 4 channel asynchronous transceiver integration chip which TI Corporation produces, its each channel can from the auxiliary equipment or the MODEM receive data, realizes the string - and transforms; Simultaneously it may also receive the data from the CPU termination, realizes and - the string transformation. Under the FIFO pattern, before the transmission and the receive, the data buffering is 16 byte data package, reduced the CPU interrupt quantity. The interior contains 4 piece of improvements the 16C550 asynchronous transmission components, causes serial I/O to be more reliable, each channel may realize serial and the parallel two kind of connection mode transformation, each channel’s condition may through the CPU operation read, be possible to gain the operation situation or any error status. The three states of matter output provides TTL driving force, the priority interruption system control, the programmable serial interface characteristic for the bidirectional data bus and the control bus.
The TL16C554 main feature is as follows: (1) has the logical control TL16C550 asynchronous communication unit by 4 to be composed; (2) highest may reach 1 Mbps the baudrate, has the programmable baudrate generator, is advantageous for the nimble selecting data receiving and dispatching frequency; (3) has 16 byte receiving and dispatching FIFO buffer; (4) has may the independent control transmission, the receive, the line status and the MODEM condition interrupt; (5) has full-duplex’s receive transmission line, but carries on the receive transmission control independently; (6) comprehensive line status report function; (7) full graduation interruption system control; (8) three states of matter TTL level output.
TL16C554 has 68 pin PLCC and 80 pin TQFP two kind of seal forms, each pin’s function is: A0~A2 is the internal register’s selection signal end; D0~D7 is the bidirectional 8 bit data line; IOR is reads elects to go side (low level effective); IOW is writes elects to go side (low level effective); INTA~INTD is interrupts A, B, C, D (high level effective); CSA~CSD is selects patches or strips of land as worth saving for seed A, B, C, D (low level effective); XTAL1, XTAL2 are the external clock ends, these two feet may meet the crystal oscillator or the external clock signal; RXA~RXD is serial input A, B, C, the D end; TXA~TXD is serial output A, B, C, the D end; RXRDY is the receive prepares the signal end (low level effective); TXRDY is the transmission prepares the signal end (low level effective).
2.2 system diagrams
Realizes the central station using TL16C554 multi-channel data receive system diagram as shown in Figure 1 with various terminals, the data acquisition will gather hydrology data storage in monolithic integrated circuit, what here master control MCU use is ATMEL Corporation’s AT89S8252. Master control MCU must complete the work is the hydrology information storage which collects to the local computer, simultaneously transmits through the TL16C554 4 asynchronous serial ports to each broadcasting station, moreover may also pass Internet to the long-distance computer transmission. Four broadcasting stations can also through four Modem to the local PC transmitter data.
2.3 hardware circuit diagrams
Following introduces the central station multi-channel data receives the hardware circuit diagram. In Figure 3, TL16C554 data line D0~D7 is direct and at89S8252 P0 mouth is connected; TL16C554 internal register choice line A2~A0 meets AT89S8252 after address latch 74HC373 low address P0.2~P0.0, AT89S8252 with is this time same to the TL16C554 internal register’s read-write operation to the exterior RAM read-write. TL16C554 selects patches or strips of land as worth saving for seed CSA~CSD to meet P1.0~P1.3 separately, like this may through select channel A~D to the P1.0~P1.3 reset. TL16C554 broken line INTA~INTD dispenses AT89S8252 P1.4~P1.7 to be connected, and meets AT89S8252 after a four input rejection gate INT0. Like this when many serial ports simultaneously use, any will assign the correspondence event’s appearance to cause UART to have a communication interrupt, and will trigger the exterior INT0 interrupt. In the interrupt servicing subroutine, through to the P1.4~P1.7 examination determined that which mouth the interrupt does come from, and completes the corresponding data processing. TL16C554 IOR, IOW and RESET directly with AT89S8252 RD, WR and RESET are connected, serial outlet A is connected through modem MC145442 and broadcasting station J1, because B, C, D are identical with the broadcasting station connection mode, therefore the abbreviation has not drawn.
3 software designs
The system software design’s important part is the TL16C554 initialization. On after system electricity, should distinguish each channel which the initialization must use, and to its internal 13 register’s read-write, the baudrate, the data frame form as well as the FIFO control and so on carries on the establishment. Below is the TL16C554 initialization routine:
ini16554:
mov dptr, # 0fffbh; Direction linear control register
mov a, # 80h
movx @dptr, a
anl dpl, # 0f8h
mov a, # 0ch
movx @dptr, a; Delivers the baudrate constant 9600
inc dpl
clr a
movx dptr, a; Delivers the baudrate constant top digit 00
inc dpl
inc dpl
mov dptr, # 0fffbh
mov a, # 03h; Establishment data frame form, data position 8, 1 stop position
movx @dptr, a
inc dpl; modem controller bit3 control break
Correct production
mov a, # 02bh
movx @dptr, a anl dpl, # 0f8h
orl dpl, # 02h
mov a, # 083h
movx @dptr, a; Receives FIFO to be effective, a 8 byte interrupt
anl dpl, # 0f8h
orl dpl, # 01h; IER interrupt permission controller
mov a, # 001h
movx @dptr, a; The receive buffer knows how things stand the interrupt
ret
4 concluding remark
The experiment indicated that the above software and hardware design may realize four group serial signal reliable prompt asynchronous receiving and dispatching services. Moreover using TL16C554 and at89S8252 constitution’s serial port expansion system, the hardware interface is simple, use economy, and the data transmission distance may far be possible to be near. This kind of host has been applied from the type many machine serial communication systems to the actual system, this electric circuit stable reliable, has certain application value.
