Abstract: BCM5690 is the integration which BroadCOM Corporation promotes has 12 milliardfold ports and 1 10,000,000,000,000,000 port’s multi-layered exchange chips. The article introduced quite comprehensively this chip’s structure and the function characteristic, have given its access control way and the data flow, simultaneously gave has designed the exchange complete machine with BCM5690 the hardware architecture and the software realizes the method.
Key word: Milliardfold ethernet; BCM5690; Piling up one on top of another; Data flow
At present, 10,000,000,000,000,000 chip technologies make the recent progress unceasingly, especially in “really” 10,000,000,000,000,000 questions, only then has a more advanced chip, the equipment manufacturer only then can and in the characteristic foundation develops own switchboard system construction in the chip function. Although Broadcom, Intel, Marvell, the American country semiconductor (NS), Infineon (Infineon) (STMicro electronics) has promoted the newest milliardfold ethernet chip product with the Italian law semiconductor. But 10,000,000,000,000,000 chip’s development without doubt speed up 10,000,000,000,000,000 products from the hardware and the construction stratification plane the development speeds.
Therefore, BroadCOM Corporation has developed BCM5690 (12 1) the single chip exchange plan. This integrated circuit chip integrated 12 milliardfold ports and 1 10,000,000,000,000,000 ports, is a section of function is quite formidable and the comprehensive three milliardfold ethernet exchange chip. In the article will introduce that in detail the BCM5690 chip the function characteristic as well as realizes the method based on this chip’s switchboard.
1 BCM5690 chip synopsis
1.1 BCM5690 chip architecture
BCM5690 is the chip provides has 12 GE connections (a milliardfold port) and 1 HiGig connection (internal integration port), and has piles up one on top of another the function. Component’s port uses the PCI connection to carry on the management. Its structure diagram as shown in Figure 1.
May see by Figure 1: The BCM5690 chip is composed of the below some major function module:
(1) GIGA connection controller GPIC: Uses in providing the GE mouth and between the exchange logic connection.
(2) internal integration port (HiGig) controller IPIC: Mainly provides the HiGig mouth with internal exchange logic between connection, sometimes also uses between many piece of BCM5690 piling up one on top of another the operation.
(3) CPU management connection CMIC: Mainly provides CPU and between the BCM5690 equipment different function block connection, simultaneously also uses in such as MIIM, I2C and lamp’s functions and so on processing. This module unites through the PCI connection and CPU, may cause CPU to visit and to control BCM5690, but the DMA engine support data passes on from CPU to BCM5690 or passes on from BCM5690 to CPU.
(4) address analysis logic ARL: This logical function module may determine this data packet in the data packet foundation the repeater strategy. It uses two tables (L2_TABLE), two multicast table 煟 ta Bolivia to stop TABLE 牎⑷The level table (L3_TABLE), three longest prefix match table (DEF_IP_HI and DEF_IP_LO), three meet the oral thermometer 煟 ta often INTF 牎ⅲSang Xiongduan ケ resentment ǎ ta Chang Lusang the school stops vast, the VLAN table (VLAN) as well as spanning tree the Group table (VLAN_STAG) decided how to retransmit the data packet.
(5) public buffer pool CBP 煟 gathers together vast leads awake bites pulls fresh guarantees stops Lu Can Miao the Mo buffer. CBP a unit is composed of 8192 (8K), each unit 128 bytes. In equipment’s each data packet consumes one at most unit.
(6) memory management unit MMU:BCM5690 has an independent memory management unit. Each MMU and equipment’s function block (GPIC, IPIC and so on) are connected. MMU is responsible for the data packet the cushion and the dispatcher. It first receives the data packet, then again data packet cushion, and when transmission performs to dispatch, simultaneously it also manages the exchange unit the class to control the characteristic. The summary, is cushion logic, dispatcher logic, the class controls logic. Cushion logic places CBP from a CP-BUS receive package of coexisting, similarly also gains Bao Bing from CBP to transmit them to CP-BUS comes up. Package of transmission order by dispatch logic basis package of first rank determination. The class controls logic to hope ta 犠 the fir prevention and the Backpressure two ways including the Head-of-Line 煟 decayed tooth.
Between these functional module may relate through two internal main lines: CP-Bus (Figure 1 thick heavy line shows), S-Channel Bus 熗 mark Bi Fu to know by heart rat-a-tat shows 牎 F to wash with watercolors school vast school Bus to use in the chip the data packet high speed transmission, it supports all port’s at the same time line speed repeater. But S-Channel Bus has two functions: First is uses in MMU controlling to other function block class; Second is visits the internal register and the table through CMIC using the software control.
1.2 BCM5690 chip characteristic and function introduction
Broadcom the Corporation XGS series chip’s important characteristic has piles up one on top of another the function, this function may many exchange chips combine in together, forms a large-scale system, or will be many to take along to give trades the chip the system to combine is forming a complete system equipment together. This kind of function are most may realize 30 equipment’s piling up one on top of another.
BCM5690 can expands the system capacity through Hi-Gig and GIGA. It has four kind of patterns, the cascade pattern forms through the Hi-Gig mouth unidirectional interconnection (moves in a circle network); But the full-duplex piles up one on top of another the pattern bidirectional to be connected through the BCM5690 Hi-Gig mouth with BCM567X expands the capacity (ring-like network); Third is the chassis pattern, this pattern is forms Hi-Gig through the back board interconnection (star type network). May realize the redundant backup and the progressive exchange, cannot relay, and the efficiency ratio circumduction network is high; Finally is SL form piling up one on top of another, it interlocks BCM5690 through the GIGA mouth. Shown in Figure 2 is the BCM5690 functional block diagram.
BCM5690 is a model of milliardfold ethernet exchange chip, it supports two exchanges, three routes as well as the 2~7th data packet classifications and the filtration and so on.
Address analysis logic is the BCM5690 integrated circuit chip central part 煟 pulls school Sang Gui Wozhuo m to decide the single package’s repeater direction with it.
In the BCM5690 integrated circuit chip’s fast filtration processor (FFP) is one carries on classified and the filtration engine through the 2~7th data packet. Each GE mouth has FFP to be responsible for a package of classification and the renewal respectively. FFP may changes through disposition register GIMASK and GIR-ULE conforms to the condition data packet characteristic 熎 to wash with watercolors the school to pull Sang Tingli the cherry sou broom corn millet to know washes with watercolors stuffy ヅ urine ∠ wisdom GIRULE to use in having the operational order. Regarding each data packet, most may change 16 match characteristics. If simultaneously has many characteristics to meet the matched condition, is in the top digit in GIMASK the first disposition.
Control regarding a package of cushion and the class, BCM5690 also integrated 1MB data packet buffer CBP, this buffer may use in common for all ports.
In BCM5690 register MIRROR_CONTROL and IMIRROR_CONTROL use for to establish by the mirror image port and the mirror image port, two register’s contents should maintain consistent. It supports in this chip the mirror image.
In the BCM5690 integrated circuit chip’s link polymerization (trunk) may support 8 port’s Trunking most greatly, altogether 32 group of Trunk, and may carry on the cross chip port Trunk. Moreover, BCM5690 also supports the speed to reach as high as 66MHz the PCI connection, and may to all data packet line speed exchange as well as RMON, SNMP, STP and Rapid STP provides the support.
2 access control way and data flow
2.1 access control way
BCM5690 supports a series of conforms to the PCI standard register 熣 wu ┘ mu mo biao city ji to fall the uncut jade post ping zhi lie 煟 to stop hopes mold Sang Mu牎⒌刂 Fang Zhanlai Nao disposes far and maps again. CPU the control is through visits the PCI register to BCM5690 to realize. The BCM5690 register divides into the direct visit and must directly visits two kinds. May visit directly the register maps PCI the memory space 熣 wu ┘ mu mo to entertain with food and drink the mixed tomb school to incite 刂 duckweed mu mo cooked food good fortune Huan Yutan the ǖ male 刂 Philippines to move vast. On electricity initialization period, the system disposes each PCI equipment’s base address and the address range automatically, in order to visit in each PCI equipment’s register only. The BCM5690 visit mechanism divides into three types: First, PCI disposition space; Second, PCI memory mapping I/O, for instance through the PCI equipment to DMA, MIIM and I2C control; Third is the news mechanism.
2.2 data flows
All data streams must pass through input section (Ingress), memory management unit (MMU) and the output unit through the exchange chip (Egress) these three flows. Its data flow as shown in Figure 3.
Ingress (input logic) is the data wraps on each port’s logical flow. Each port has own input logic, input logic is responsible for all package’s repeater (exchange) the strategy, decided that which port gives the package, according to the repeater information the data packet transmission for MMU, carries on the cushion and the dispatcher, and carries on processing by the line speed to the package. Input logic and majority of exchange function connection.
MMU (memory management unit) the primary cognizance data packet’s cushion and the dispatcher, it receives the data packet which and cushion these packages comes from the input logic, simultaneously carries on the dispatch to these packages and gives them output logic. The data packet enters when MMU will save in CBP. CBP has the 1MB size to use in common for all ports. MMU mainly has four parts of functions: Resource count, back pressure, HOL prevention mechanism, dispatcher. And the resource count is mainly the statistical current consumption CBP unit number or the CBP data packet integer, when does the determination data package enter the back pressure or the HOL prevention; The dispatch is determines a package of transmission according to the priority and the COS four kind of dispatcher criterion the order and the weight successively.
Egress (output logic) mainly and sends from the MMU gain data packet it each port, this is in the entire flow the simple a link. It issues the first package the output port, then determined whether to wrap in the transmission data increases tag. The concrete flow is as follows: First from MMU request data packet, if transmits the package request does not bring tag, is responsible tag to remove; Then estimated data package of CRC; Finally the bawyo for the MAC transmission (in peculiar circumstance, CMIC directly for data packet by DMA way transmission CPU).
3 based on BCM5690 exchange complete machine design
3.1 hardware realize
The author has used two piece of BCM5690 and four piece of BCM5464 in the design, the sur- four SFP connection’s milliardfold light connection realizes 16 port’s 10/100/1000M electricity mouth and 4 milliardfold light mouth exchange complete machine. BCM5464 is BroadCom four port’s milliardfold PHY.
Figure 4 is this exchange complete machine master control board hardware architecture, its hardware circuit by exchange unit, physical interface unit, RJ45 and lamp connection unit, the light connection unit, the control unit, the CPU coupling unit, the clock unit, the power source unit is composed. And the exchange unit has selected two piece of BCM5690, between them back to back connects through the Hi-Gig mouth realizes the correspondence, has with other majority of unit connection. Each piece of BCM5690 is connected through the PCI connection and the CPU coupling, mainly uses for with the CPU correspondence to realize to the chip management.
Shown in Figure 4 in electric circuit’s CPU to use Motorola Corporation’s PPC8240, primary cognizance overall system’s revolution dispatch. 12 electricity mouths are connected through the back board main line with each card, realizes various card first scroll function. When the master control board takes independent three switchboards alone, it at the same time will take the connection which interconnects with other three equipment. 4 milliardfold light connections may expand ethernet’s transmitting range with this equipment first scroll.
This system used BCM5690 which two back to back connected to carry on the design, like this might converge this system the cascade pattern. After piling up one on top of another completes, through, in piles up one on top of another the mouth above ethernet Bao Shoubu adds the information, may cause between the chip and the chip, the system and the system realizes the intelligence transmission through the Broadcom appropriation communication protocol, thus realizes the data to wrap between the different chip, the different system’s repeater.
Moreover, but may also through establish IPIC the CONFIG register (IPIC_CASCADE, MY_MODID), the MODPORT table and Giga bit the port CONFIG register comes to pile up one on top of another carries on the disposition.
3.2 softwares realize
a. initialization flow
When design software module initialization flow, first is the pattern establishment, as a result of the BCM5690 regular work in the capitellum 煟 yu liang deng deng yu peaceful lu peaceful wisdom lie liang curtain wisdom 犇 J sword, but PPC8240 work in big end of pattern, therefore needs the enemy pattern to carry on the establishment; Then searches the PCI equipment, gains each PCI equipment’s equipment number as well as the respective base address; Afterward deals piles up one on top of another the pattern to carry on the establishment, so that between two piece of BCM5690 two table contents can exchange; Finally is the basic exchange function and the DMA channel’s disposition.
b. software architecture
Figure 5 is the software architecture diagram which the author designs. And what involves the driver and the driver seal is the SAL level, the Driver level and the BCM level. The SAL level may carries on to the operating system and the actuation level isolates, may provide the PCI interrupt as well as the PCI equipment’s search, the thread, interrupts, the synchronization and the memory management. The Driver level realizes, the table initialization, the memory initialization, the chip including the BCM5690 register’s access mode to pile up one on top of another the pattern the establishment, L2 and the L3 address operation and the search, the data packet transmission/receive as well as port’s management and so on.
