Introduction
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Many surveys and the control device are through the serial port with other equipment correspondence, causes data between equipment’s alternately and the remote control is restricted. If can the serial port data conversion network data form, set up local area network (LAN) to carry on the data alternately with the transmission, then the above limit will obtain the effective improvement. Considered the ethernet network technology easy to understand, to realize, the management and the maintenance, and the cost is inexpensive, the network topology nimble merit, builds the data interactive platform using the ethernet network technology. In which key is connection switch’s realization. The DSP chip takes one kind of special embedded microprocessor system, has the inserting association processor and uses in the fast data processing the parallel data channel, moreover DSP also has the formidable function in the phonetic image signal processing aspect. Introduces the DSP technology in the embedded network equipment, may cause the embedded ethernet becomes quicker, the cost is lower, also easier to carry on the function to expand, therefore selects the DSP chip to take the connection switch’s micro controller. In order to raise the network service efficiency, may use from the definition from the data link layer to the application layer network service agreement, meets the specific situation application need; If need, but may also compile one translates mutually from the definition agreement and TCP/IP the gateway software, realizes the embedded network and the Internet connection. This article introduced the connection switch has solved in vehicle’s digital voice communication system’s connection transformation problem. 1 connection switch’s hardware design When designs an embedded system, not only need consider the system must have the function, meanwhile needs to consider factors and so on price, volume. The TMS320C3X[1] series chip is the floating point calculation DSP chip which TI Corporation promotes. As a result of it high performance-to-price ratio, the TMS320C3X application is extremely widespread; Because unifies the floating point calculation and the fixed-point arithmetic, has a higher precision, and does not need to consider the operation the overflow question, therefore floating point DSP has a higher performance, realizes higher order language [2] easily on system’s processor. TMS320C32 is the TMS320 series floating point digital signal processor’s new product, has carried on the simplification and the improvement in TMS320C30 and in the TMS320C31 foundation. Mainly includes in the structure improvement: The invariable width’s memory interface, the shorter instruction cycle, may establish the interrupt which the priority the double channel DMA processor, the nimble vectoring procedure load mode, may locates the edge/level triggering interrupt mode which as well as may elect to the meter and so on. May use the assembly language to the TMS320C32 development, may also use the C language. The use assembly language’s merit lies, the running rate is quick, may use the chip fully the hardware characteristic; But the development speed is slow, the procedure readability is bad. Uses the C language the superiority to lie, the programming is easy, the debugging speed is quick, the readability is good, may reduce the development cycle greatly; But the C language regarding its internal has not mapped the address the special function register not to be able to operate, like IF and IE, AR0~AR7 and so on. The ethernet connection chip uses CS8900A[3]. This chip was one kind of local area network signal processing chip which Cirrus Logic Corporation produced, the interior integrated on the piece RAM, front end its simulation including Manchester codec encoder-decoder, clock recovery electric circuit, 10BASE2T transceiver and filter and AUI (Attachment Unit Interface) connection. CS8900A MAC (Medium Access Control, media access control) the engine is responsible for the ethernet data frame the transmission and the receive, the examination and the processing conflict, the production and the examination frame directs carrier (Preamble), produces and verifies CRC automatically (Cyclical Redundancy Check, cyclical redundancy check) the code. The chip conforms to the IEEE 802.3 ethernet standards in the network physics level, supports the full-duplex to operate, is the embedded platform realizes the very good selection scheme which 10 Mbps ethernet connect. Connection switch’s hardware diagram as shown in Figure 1. DSP takes the entire hardware module CPU, SRAM to serve as the exterior data-carrier storage, Flash uses in the stored routine, CPLD or FPGA uses in expanding DSP the foreign interface control. The dashed line frame is the expandable module.
2 TMS320VC32 and CS8900A connection methods CS8900A 20 address wires and TMS320VC32 address wire low 20 phase company; CS8900A 16 bit data line and TMS320VC32 data line low 16 phase company; The data bus top digit enables the origin A0 control. Expands TMS320VC32 through piece of CPLD the external control function, controls CS8900The interrupt request, the replacement and the read-write operation. TMS320VC32 and CS8900A connection relations as shown in Figure 2.
Establishment ethernet connection chip CS8900A work in the I/O pattern. Through may establish the network termination interface circuit’s function and the read status messages to the chip various registers’ operation. The CS8900A main register includes: LineCTL decided that CS8900The basic disposition and the physical interface, the establishment starting value is 00D3H, the choice physical interface is 10BASE2T. RxCTL controls CS8900A to receive the specific data newspaper, establishes RxTCL the starting value is 0D05H, receives in the network the broadcast or the goal address and the local physical address same correct data newspaper. After RxCFG controls CS8900A receives the specific data newspaper, will initiate the receive interrupt, RxCFG may establish is 0103H, receives the correct data to report time has the receive interrupt. BusCTL the control chip’s I/O connection operation, the establishment starting value is 8017H, opens CS8900The interrupt always to control the position. ISQ interruptible state register. Internal mapping accepting state register and transmission interrupt register content. When Port0 transmission and receive data, CPU through Port0 transmission data. TxCMD transmission control register. If write data 00C0H, then network card chip after the complete data reads in starts to transmit the data. TxLength transmission data length register. When transmits the data, first reads in the transmission data the length, then reads in the data through Port0 the chip. On when system electricity, first carries on the initialization to CS8900A, writes register LineCTL, RxCTL, RxCFG, BusCTL. When transmits the data, writes control register TxCMD, and will transmit the data length to read in TxLength, then read in turn the data the Port0 mouth, the data may transmit; When receives the data, CS8900 A will trigger interrupts, may receive the data in its interrupt handling routine and process. 3 connection switch’s software design 3.1 from definition network protocol In the embedded network system, may use the TCP/IP agreement, but insufficient economy. The reason is the TCP/IP agreement is too huge, is too complex, the efficiency is low. On the one hand is the embedded system various units interior CPU processing speed is limited; On the other hand, in certain specific situation specific duty’s application environment the TCP/IP function redundancy, has hindered the hardware potency biggest display. Therefore, in view of the specific application, formulates correspondingly from the definition network protocol, nimble convenient, pointed, the economy is practical. The following list from the data application’s angle, defines one simply, the practical ethernet transport protocols. 3.2 agreement levels The system refers to ISO the OSI model, uses the deflation the network architecture. As shown in Figure 3, the network architecture divides into 3: Physical level, data link layer and application layer. Physical level stipulation network analysis situs form and correspondence signal electrical specification; The data link layer realizes the point-to-point correspondence regulations, carries out the IEEE802.3 CSMA/CD agreement completely.
3.3 structures The ethernet frame structure is as follows:
Before the physical level’s, synchronous code (i.e. physical frame leader symbol physics frame limits symbol) 8 bytes produce automatically by the hardware. Except these 8 bytes, adds other field’s length, may obtain the ethernet frame greatest length is 1 518 bytes, the smallest length is 64 bytes; Before addition 8 byte synchronous codes, then obtain the smallest frame length are 576. Such length’s frame can guarantee that all conflicts may examine. This is because in the IEEE 802.3 standards, two stand’s farthest distances are smaller than 2 500 m, becomes by 4 repeater connections, its conflict window is 2 time of electric cable propagation delay adds on the 4 repeater’s sum of bidirectional detention, equals for 51.2μs. Speaking of 10 Mbps ethernet, in this time section was equal to transmits 64 bytes (i.e. 512) data. Uses CSMA/CD to take one access control way, means that in the shortest data frame length and the network the longest transmission delay time-gap has the close relationship. Must guarantee presents the conflict when the sending process, in conflict territory’s all points should know that has had the conflict, with the aim of taking the suitable measure. This needs the shortest data frame length to be bigger than in the network the longest transmission delay time-gap, in addition blocks the additional period and the synchronization delay time and so on. This is in the IEEE 802.3 standards the most short frame length is 64 bytes origins. [4] And the application layer frame type divides into the data frame and the data confirmation frame two kinds, the concrete structure is as follows:
Because the data frame length variables, also, because the data confirmation frame’s MAC level length is only 18 bytes, therefore when network controller initialization must establish (when MAC the level PAD packing function i.e. MAC frame length is short in 64 bytes, network controller automatically its packing after 64 bytes gives physical level again). May also formulate some simple controls or the management information frame from the definition data frame’s reservation management unit, so that well extended function and organization software. As space is limited, this does not give unnecessary detail. If wants to link enters Internet, needs to join one in the system to be able to transform this agreement and the TCP/IP agreement front end gateway (materially is software system which translates alternately). 3.4 programming flow This connection switch must realize the function is receives from the RS232 serial port the serial port data conversion ethernet frame form transmits to the ethernet, and receives from the ethernet the frame data bale breaking transforms to the serial port transmission. In the programming contains the initialization routine, the main loop, the serial interface procedure and the network service interface routine. The program run first carries on the initialization work, including initialization CS8900A, the initialization serial port and initialization some parameters, then enters the main loop. The main loop internal recycling moves the CS8900A interrupt servicing polling routine and the serial port buffer polling routine, if has the CS8900A interrupt request, then interrupt transfer network service interface routine; If the serial port buffer has the data, then interrupts transfers the serial interface procedure. Flow as shown in Figure 4.
(1) serial interface procedure The serial interface procedure is DSP carries on the data receive, the transmission procedure through 16C2550 to the exterior data mouth, the goal carries on the data transmission. This procedure including serial port transmission receive procedure and Data organization procedure. Transmission and receive through interrupt concurrent processing. The entire serial port calling order transfers in the main loop. Its module’s flow is: The transmission receives the network serial port data -> to open the data mouth -> interrupt transmission; The receive interrupt receive -> reorganization serial port data -> transmits to the network comes up. The transmission and receive logical flow as shown in Figure 5.
(2) network service interface routine The network interface procedure is DSP and receives the information through CS8900A to system’s other unit routing directive the procedure, the goal is and system’s other unit correspondence, the receive and the transmission data packet and the signaling data packet. This procedure including network data receive procedure, network data calling order, Data organization procedure. The transmission and receive service routine flow as shown in Figure 6.
Conclusion This connection switch has applied successfully in vehicle’s digital voice communication system. The result indicated that this plan has realized the data live transmission successfully, may give each kind to carry on the data transmission using the RS232 serial port embedded system’s networking operation to provide the connection solution. This plan has reserved the function which the promotion expands. Turns on the PCM encoder and makes the corresponding modification to the procedure, may realize the pronunciation digitization network service; Turns on a/D switch and each kind of sensor may realize data acquisition system’s networking. |
