• Realizes - en.51rd.net based on the NiosII HDLC agreement control system

    Abstract: The NiosII system is Altera Corporation’s SoPC solution, the HDLC agreement is in the correspondence domain face the bit high-level data link control regulations. Introduced communication protocol realizes the method based on NiosII the soft nucleus’s HDLC, and in the foundation which the agreement realizes, has completed to the unattended base-station system’s monitoring and the management. The base depot end’s function by completes based on NiosII soft nucleus’s SoPC, PC machine completes as the monitoring center to the base depot long-distance monitoring and the management. This system in guaranteed that the bilateral reliable communication under the premise, realizes PC finally between master control machine and the base depot real-time, the reliable information alternately with the monitoring management function.
    Key word: On programmable piece system; NiosII soft nucleus; High-level data link control; Base-station system; Circulation redundant codes verification

    An introduction

    HDLC (High-level Data Link Control) the agreement is in the correspondence domain applies one of most widespread agreements, faces the bit high-level data link control regulations, has the formidable error detection function and the synchronized transmission characteristic, guaranteed that the data transmits [3] reliably. In market special-purpose HDLC chip because of pursue function completeness, but causes the chip the control becomes complex. In fact to certain special situations, may choose in the HDLC agreement to conform to the system request partial functions, designs one kind of function to be relatively simple, the use nimble controller.

    The NiosII system is Altera Corporation’s SoPC solution, it is a movement on the FPGA 32 RSIC processor. Altera Corporation provided the formidable design regarding the NiosII development to develop platform QuartusII, SOPC Builder as well as NiosII IDE[2] [4]. Thus, the hardware circuit and the peripheral device connection, the NiosII soft nucleus’s disposition, the C language compilation and the debugging may organically unify, raised the system design efficiency greatly, is advantageous for system’s renewal and the promotion.

    This design is uses Altera Corporation’s CYCLONEII chip EP2C35-672 FPGA to realize based on the NiosII HDLC agreement control system. In completes the communication protocol, under the guarantee reliable communication premise between finally, realizes master control machine and the base depot terminal real-time, the reliable information alternately with monitoring management function [1].

    Two HDLC agreements show [3]

    The HDLC agreement has the following characteristic: The data message may transmit transparently; Full-duplex communication; Uses the window mechanism and the taking along reply; Uses the frame verification sequence, and carries on the serial numbering to the information frame, prevents to leak receives or receives again, the transmission reliability is high; The transmission control function and the processing function separation, the application is flexible. HDLC carries out the data transmission control function, generally divides into 3 stages: Data link establishment stage, information frame transmission stage, data link release stage.

    The HDLC agreement transmits the data take the frame as the basic Information unit, regardless of being transmits the data message perhaps the control information, each frame uses the unified frame form, as shown in Figure 1:

    Figure 1 HDLC frame form

     1. Attribute field (F)

    The HDLC agreement stipulated that all information’s transmission must by a sign start of word, and finished by the identical sign character, this sign character was 01111110. The receiving end might through search 01111110 judges the frame the start and the conclusion, by this establishment frame synchronization.

    2. Address field (A)

    The address field expressed on the link stands address. The address field is 8, also the available 8 multiples carry on the expansion, uses in marking receives this frame the station address.

    3. Control field (C)

    The control field is 8, uses for to express the frame type, the frame serial number as well as the order, the response and so on. By Figure 1 knowledge, because the C field’s constitution is different, may divide into the HDLC frame three types: The information (I) frame, monitors the (S) frame, non-to number the (U) frame. In control field, what 1st is “0″ is I, what 1st, 2 are “10″ is S, what 1st, 2 are “11″ is U.

    4. Information field (I)

    The information field intension contained user’s data message and from the upper formation each kind of control information. In I and certain U, has this field. The HDLC frame’s information length is invariable, its length decided by the receiving and dispatching station buffer’s size and line’s mistake situation, but must be the 8bit integral multiple. It may transmit outside the symbol character the random binary message.

    5. verification sequence field (FCS)

    The frame verification sequence uses to the frame carries on the CRC cyclical redundancy check. Uses 16 cyclical redundancy check code in the HDLC agreement to carry on the error control, its verification scope from the address field 1st bit to information field final 1 bit sequence, and stipulated to transmit transparently “0″ not in verifies in the scope which inserts. Its production multinomial is g(x)=X16 X12 X5 1.

    Three system synopses

        The base-station system is often placed in is quite scattered, the environment to be quite bad and the unattended place, therefore it moves the reliability appears especially important. SOPC many characteristics have satisfied this kind of systematic request. Based on this localization, this system selects pc machine to take the monitoring center, on the SOPC piece the system makes the base depot end, between them uses the HDLC agreement to realize the reliable communication. The monitoring center completes the establishment and the separation link function, the SOPC base-station system the order which besides the receive, the execution monitoring center sends, but must complete the field data the gathering control, and data upload to monitoring center.

    Regarding correspondence both sides, the data has transmits and receives two directions of transmission, namely upward data stream and downward data stream. When transmits the data, according to the HDLC agreement, the data encapsulation framing, namely adds on first frame, the address field, the control field, the information field, the CRC verification section, the frame tail, when the buffer has the space, treats the transmission the framing data delivering buffer, the data frame passes through UART to deliver opposite party RS-232 connection again, the data enters the debit the buffer, the debit carries out and the transmission opposite operation, namely from the buffer readout, to its Xie Zheng, the CRC verification judgment, the decoding, and defers to the information execution corresponding operation which withdraws. Complete system total diagram as shown in Figure 2:

    Figure 2 system diagram

     

    Four based on NiosII SOPC functional design

    Divides into the hardware design and the software design, separately in QuartusII, SOPC Builder and in NiosII IDE completes.

    1 hardware design               

    (1) hardware design structure

        _ yingjian the hardware design structure including RS-232 connection, PIO connection, xianshi display module and from define CRC xiaoyan checking command, these part be with NiosII soft nucleus dispose. NiosII as system’s flow control center, its function is self-evident, through uses SOPC Builder to carry on to NiosII has custom-made, enormous reduced system’s use resources. Overall system hardware design diagram as shown in Figure 3:

    Figure 3 NiosII hardware schematic diagram

     

    (2) NiosII soft nucleus disposition

    Using in QuartusII software’s SOPC Builder, increases the processor, the main line, internal ROM, PIO, UART, NiosII other peripheral devices and the connection. System’s top layer module is composed of the NiosII soft nuclear processor standard edition and the system clock, the system clock gives various peripheral devices and SDRAM through the phase-locked loop PLL redistribution.

    (3) from defines the CRC checking command

        The programmable soft nuclear processor most major characteristic is to may facilitate nimbly increases the instruction, like this may realize the system in with the software processing time-consuming many essential algorithms with the hardware logic circuit. Is actually the user lets a function which from the definition instruction the NiosII soft nucleus completes, this function by uses the HDL language description the electric circuit module to realize, this module is connected the NiosII soft nucleus on the arithmetic logic part.

    The CRC verification’s general algorithm needs the massive logic and the circulation operation, if with the software realizes, then must take many clock cycles, causes system’s efficiency to reduce, but completes with the hardware only needs several clock cycles. NiosII has happen to provided the user from the definition instruction function, therefore for NiosII increases from defines the CRC checking command to complete this part of functions, raised system’s efficiency greatly.

    2 NiosII application software design

    The NiosII application software realized with the C language, has completed the HDLC agreement and to base-station system’s control two duties. First completes Xie Zheng who in the HDLC agreement requests to verify processing, the data to pack operations and so on repeater, error processing, guarantees the communication unimpeded and the unreliability. The base depot end after receiving the monitoring center the order, under application software’s control, actuates the equipment execution corresponding operation, is mainly to parameter and so on temperature, humidity, voltage, smoke sensitivity reads and the environment parameter adjustment, after the execution finished, will feed back the monitoring center finally. Based on this thought that the NiosII software divides into the HDLC agreement to realize the part and the order operative paragraph.

    (1) the agreement realizes the part

    a, receive data

    First, establishes the link to complete to variable and so on frame sequence, each kind of peripheral device parameter, flag bit initialization. After function void DeFrame () uses in receives every time Xie Zheng processing, namely includes the frame length the judgment, the CRC verification, the frame type identification, the frame serial number comparison. The CRC verification code’s operation () completes by function ALT_CI_CRC_CCITT, the concrete operations are transfer the disposition from to define the CRC checking command, bestows on the data value, then through the hardware operation returns computation’s CRC code, with data frame’s in verification code contrast, same is the correct information again, does not wait to sentence for the error message.

    b, transmission data

    Defined variable volatile int edge_capture carries on the base depot environment parameter information the capture, like temperature, humidity, voltage and so on. NiosII application software basis to environment parameter read and judgment, but must make the special handling to the unusual condition. For instance, if some parameter presents exceeding the allowed figure essential immediately the transmitter data frame to carry on the warning, causes the user to make the prompt adjustment.

    When concrete transmission, the data the mounting and design sends in the buffer waiting again first. In order to prevent the frame loss to create the waiting status which communication both sides are in stagnate stiffly, introduces the timer, namely each round of information frame must start the timer to carry on the time, if the timer overflows, in the reproduction and times. Take transmits the voltage value as an example, carries on to its concrete process explained:

    void InfoVoltageFrame ();                                    // installs the voltage frame

    void SendBuf (unsigned char Frame[], int SendDataLen);   // frame delivers the buffer

    void TimeDelay ();                                          // start timer

    If the overtime, sets at the overtime to symbolize DelayFlag=1;

    Under this condition, transfer function ReSendFrame ();              // reissues one

    Starts timer TimeDelay once more ();

    c, in HDLC agreement sliding window processing

    In the sliding window agreement the most essential frame serial number change’s specific code will only present:

    ……

    If ((RvByte(2) And &HF) /2) =VR Then ‘NS and VR do compare, equal, then receives and transmits the confirmation frame

    VR = ((VR 1) And & H7)

    ……

    If (RvByte(2) And &HF) = 1 Then    ‘receives confirms S

    SysTime.Enabled = False

          VS = ((VS 1) And & H7)

    ……

    (2) orders the executive software part

    This part of softwares mainly actuate the equipment execution corresponding order. At the same time, the monitoring center will start the automatic monitoring function, the NiosII every other 5 seconds will receive the read parameter message command which the monitoring center will send, the NiosII executive command and reads the peripheral device parameter to deliver to the transmission buffer; On the other hand, if the environment parameter will change, NiosII will carry on the judgment to it, if will exceed the allowed figure immediately on own initiative sends the warning information frame to give the monitoring center.

    Five concluding remark

    This article proposed one kind based on the FPGA HDLC agreement control system design proposal, and realizes using Altera Corporation’s CYCLONEII chip EP2C35-672. The practice indicated that realizes the HDLC agreement control system simplicity of operator, the use using NiosII to be nimble, can apply well in each kind of small communication facility. Through different period massive tests, system operation reliable, stable, has completed the real-time reliable communication and the accurate control.

     

    This article author innovates the spot: 

    1st, technological means innovation: Used NiosII this kind of new SOPC technology to realize the HDLC agreement.

    2nd, application domain innovation: Has realized to base depot each kind of information (for example working voltage, ambient temperature, humidity, smoke sensitivity and so on) real-time monitoring and reliable management.

    Reference

    1 Luo rosy-colored clouds at dawn, Zhang Gao records based on the TMS320F2407A DSP MODBUS communication protocol realizes micro computer information 2005 No.20 P.138-139,

    2 love fronts, initially Xiu qin and so on. Based on FPGA embedded system design. Xidian University Publishing house .2004

    3 Xie Xiren. Computer network course. People’s posts and telecommunications publishing house .2002

    4 Altera.NiosII Processor Reference Handbook.2006

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    Monday, November 17th, 2008 at 18:12
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