• Realizes - 51rd based on the AVR ATmega128 industry gateway the Chinese electronic net

    Abstract: Introduces one kind of bridge joint different field bus network the solution. This plan uses high performance AVR ATmega128 is its control core. AVR ATmega128 uses the ModBus/RTU agreement and the computer correspondence, controls the equipment correspondence through the multi-processor correspondence pattern with other minutes. This plan passes through moves in reality, proved that its design is feasible. 
    Key word: AVR ATmega128, Modbus/RTU, AVR multi-processor correspondence pattern, CRC16 

    1 introduction

       Now, the electronic technology development is swift and violent, particularly the monolithic integrated circuit widely has applied in domains and so on correspondence, transportation, domestic electric appliances, portable intelligent measuring appliance, robot manufacture, the product function, the precision and the quality large scale enhancement, and the electric circuit is simple, the failure rate is low, the reliability is high, the cost is inexpensive. In the monolithic integrated circuit certain application aspect, to the network flexibility and multiple demand’s unceasing increase, between the network interconnection appears more and more important. The industry gateway has provided one kind of solution for the bridge joint different field bus network.

    2 network topology

    Network connections’ topology as shown in Figure 1.

    (Figure 1)

    RS-232C is the widespread application serial port correspondence standard, but because it promotes early, has exposed the data transmission speed in the modern network service to be slow, the transmitting range is short, between connection place various signals easy to have the disturbance and so on obvious shortcoming. RS-485 is more than one kind of transmitter’s electric circuit standard, it expanded the RS-422A performance, allows in the twisted pair line a transmitter to actuate 32 loading equipments, the loading equipment to be possible to be the passive transmitter, the receiver or the transceiver, the RS-485 maximum transmitting range is 1200m, the maximum transfer rate may reach 10Mb/s. Therefore, RS-485 has the very strong attraction in long-distance correspondence and in many machine bus systems.

    As shown in Figure 1, 0 (UART0) transforms the half-duplex 485 serial ports the AVR ATmega128 standard’s general asynchronous receive/transmission correspondence connection. Similarly, the PC machine RS-232C serial port also transforms 485 serial ports. Between them uses the Modbus/RTU agreement to carry on the correspondence, AVR ATmega128 takes from the equipment. AVR ATmega128 divides with its downward AVR controls the equipment to pass 485 serial main lines and in the same place. Between them uses the AVR monolithic integrated circuit unique many machine mailing address to carry on the correspondence. And AVR ATmega128 is the master control equipment, other AVR minute controls the equipment is from controls the equipment.

    3 AVR ATmega128 monolithic integrated circuit

    The ATmega128 monolithic integrated circuit is based on AVR RISC the structure 8 low power loss CMOS microprocessor. As a result of its advanced set of instructions as well as the monocycle instruction time, the ATmega128 monolithic integrated circuit’s data turnover rate reaches as high as 1MIPS/MHz, therefore may lighten and reduce between system’s power loss and the processing speed contradiction. The AVR monolithic integrated circuit essence has the rich set of instructions and 32 general working register. All registers directly connect with arithmetic logic unit (ALU), cause an instruction to be possible simultaneously to visit two independent registers in a clock cycle. This kind of structure raised the code efficiency greatly, and has compared to the ordinary complex set of instructions microprocessor high 10 time of data volume of goods handled. The ATmega128 monolithic integrated circuit interior has in the 128KB system the programmable Flash program memory, ability which has in writes in the process which may also read, namely at the same time read-write (RWW); 4KB EEPROM; 4KB SRAM; 53 general I/O port line; 32 general working registers; Real-time clock (RTC); 4 nimble have the comparison pattern and the PWM function timer/register (T/C); 2 USART; Face byte two connection (TWI); 8 channel 10 ADC; May elect programmable gain; Internal oscillator’s programmable watch-dog timer; Serial auxiliary equipment connection (SPI); With IEEE 1149.1 standard compatible JTAG test connection, at the same time this connection may also use on the piece debugging; 6 kinds may the province electricity pattern which chooses through the software.

    4 Modbus communication protocol

    The Modbus agreement is applies on the electronic controller’s one general purpose language. Through this agreement, the controller, the controller (e.g. ethernet) and between other equipment may correspond by way of the network. It already became an general industrial standard. Had it, the different manufacturer production’s control device may link becomes the industry network, carries on the centralized monitor. This agreement defined a controller to be able to know the use the news structure, no matter but they passed through what kind of network to carry on the correspondence. It described a controller to request that visited other equipment’s process, if responded from other equipment’s request, as well as how to detect the mistake and the record. It has formulated the news territory pattern and the content public form. When corresponds when a Modbus network, this agreement had decided each controller must know their device address, distinguishes the news which sends in according to the address, decided that must have what kind of motion. If needs to respond, the controller will produce the feedback information and sends out with the Modbus agreement. In other networks, contained the Modbus agreement news to transform into the frame which or a package of structure used in this network. This kind of transformation also expanded the basis concrete network solution festival address, the route way and the error detection method.

    The Modbus network can establish is two kind of modes of transmission (ASCII or RTU) any kind carries on the correspondence. The user choice wish’s pattern, including the serial port correspondence parameter (baudrate, verification way and so on), in disposes each controller’s time, in Modbus network’s all equipment must choose the same mode of transmission and the serial port parameter.

    When the controller supposes for in the Modbus network by RTU (remote terminal unit) the pattern correspondence, contains two 4Bit in the news each 8Bit byte the hexadecimal system characters. This way’s principal advantage is: Under the similar baudrate, may transmit more data compared to the ASCII way.

    Code system:

    ü         8 binary systems, sexadecimal number 0. .9,A. F

    ü         In news each 8 territories are two hexadecimal system character compositions

    Each byte position:

    ü         1 outset position

    ü         8 data positions, the smallest significant digit transmits first

    ü         1 parity check position, does not have the verification not to have

    ü         1 stop position (has when verification), 2 Bit (does not have when verification)

    Error detection territory

    ü         CRC (circulation long examination)

    Uses the RTU pattern, the news transmission must at least by 3.5 character time stop gap start. Under network diverse character time, this is easiest to realize (following shown in Figure 2). The transmission first territory is the device address. May use the transmission character is hexadecimal system’s 0…9, A…F. The network equipment detects the network main line unceasingly, including stop time interval. When the first territory (address field) receives, each equipment carries on the decoding to judge whether to send out own. After last transmission character, 3.5 character time’s stop has demarcated the news conclusion at least. A recent news may after the stop starts.

    The entire news frame must take a continual class transmission. If before the frame completes has surpasses 3.5 character time the stop time, the receiving apparatus the refurbishing incomplete news and the hypothesis next byte will be a recent news address field. Similarly, if a recent news before being smaller than 3.5 character time is inscribing the beginning of message bom, the receive equipment will think that it is the preceding news extension. This will cause a mistake, because in the final CRC territory’s value impossible is correct. A model’s RTU news frame as follows shows:

    Outset position

    Device address

    Function code

    Data

    CRC verification

    Conclusion symbol

    T1-T2-T3-T4

    8Bit

    8Bit

    N 8Bit

    16Bit

    T1-T2-T3-T4

    When news when standard Modbus series network transmission, each character or byte by the following way transmission (from left to right): Least significant bit. Highest significant digit.

    When uses the RTU character frame, the position sequence is:

    Has the parity check

    Initiation position

    1

    2

    3

    4

    5

    6

    7

    8

    Odd and even position

    Stop position

    Non-parity check

    Initiation position

    1

    2

    3

    4

    5

    6

    7

    8

    Stop position

    Stop position

    5 CRC16 examinations

    The circulation redundant codes CRC examination technology widely applies in the observation and the correspondence domain. The CRC computation may depend on the special-purpose hardware to realize, but regarding low cost micro controller system, in does not have under the hardware support to realize the CRC examination, how does the essential question complete the CRC computation through the software, is also the CRC algorithm question. Calculates CRC16 to have three algorithms: Calculates CRC, the byte according to the position to calculate CRC, half byte to calculate CRC. These three algorithms they have the difference slightly, asks the law speed according to the position to be slow, but takes the smallest memory space; Asks CRC according to the byte table look-up the method speed to be quick, but takes the big memory; Asks CRC before half byte table look-up the method is both’s balanced, namely will not take too many memories, simultaneously the speed as for too will not be slow, compared with suitable 8 small memory monolithic integrated circuit’s application situation.

    6 AVR monolithic integrated circuit multi-processor correspondence pattern

    Setting UCSRA multi-processor correspondence pattern position (MPCM) may the data frame which receives to the USART receiver carry on the filtration. These will not have the address message frame to neglect, also will not store receives the buffer. In a multi-processor system, the processor carries on the correspondence through the same serial main line, this kind of filtration effective reduction has needed the CPU processing data frame quantity. The MPCM position’s establishment does not interfere with transmitter’s work, but in the use multi-processor correspondence pattern’s system, its consumer Buddhist meeting differs from. If the receiver receives the data frame length is 5 to 8, then the first stop position expressed what this contains is the data or the address message. If the receiver receives the data frame length is 9, then by 9th (RXB8) determined that is the data or the address message. If the determination frame type’s position (first stop position or 9th data position) are 1, then this is the address frame, otherwise for data frame. Under the multi-processor correspondence pattern, many from the processor may from a main processor receive data. Must first through the decoding address frame determine what addressing is which processor. If the addressing to some processor, it will receive the following data normally, but other can neglect these frames from the processor until receives another address frame.

    Regarding an achievement main engine’s processor, it may use 9 bit data frame form (UCSZ = 7). What if transmits is an address frame (TXB8 = 1) (TXB8) sets 9th 1, if is a data frame (TXB = 0) resets it. Under this kind of frame form, must work from the processor in 9 bit data frame form.

    Below namely for carries on data exchange under the multi-processor correspondence pattern the step:

    5.1 possess from the processor works in the multi-processor correspondence pattern (UCSRA register’s MPCM setting).

    after 5.2 main processor transmission address frame, possesses can receive and read this frame from the processor. From processor UCSRA register’s RXC normal setting.

    5.3 each can read the UDR register’s content from the processor to determine whether he is selected. If selects, resets UCSRA the MPCM position, otherwise it the waiting next address byte’s arrival, and will maintain MPCM is 1.

    5.4 will be received by the addressing from the processor all data frame, until receives a new address frame. But these maintain the MPCM position are 1 will neglect these data from the processor.

    after 5.5 is received by the addressing processor the last data frame, it setting MPCM, and waits for the main processor transmission next address frame. After then the 2nd step step repeatedly carries on.

    Uses 5 to 8 bit frame forms is may, but is not practical, because the receiver must in uses n and between the n 1 frame form carries on the cut. As a result of the receiver and the transmitter use same character length establishment, this kind of establishment causes the full-duplex to operate becomes very difficult. If uses 5 to 8 bit frame forms, the transmitter should establish two stop positions (USBS = 1), in which first stop position uses in judging the frame type. Do not use reads - the revision - to write the instruction (SBI and CBI) operates the MPCM position. MPCM and TXC the symbol use same I/O unit, will use SBI or the CBI instruction possibly will not be careful that will reset it. In this design proposal, AVR ATmega128 takes in the multi-processor correspondence pattern the main processor, other AVR minute controls the equipment to do for from the processor.

    7 concluding remark

    Uses network topology which this plan said that because between AVR ATmega128 and the superior machine correspondence is based on the Modbus standard agreement, but controls between the equipment with other AVR minute to use the AVR monolithic integrated circuit unique multi-processor correspondence. Therefore, during guarantee system open, can also guarantee the data processing efficiency the enhancement. In the traffic control, aspects and so on intellectualized parking lot management system management system, this design proposal has certain reference value.

     

    Reference

    [1] Chen Dong cloud, Du Jingcang, no matter what tan oak swallow. ATmega 128 monolithic integrated circuit principles and development instruction. Mechanical industry publishing house, 2006.

    [2] Richard Barnett, Larry O’Cull, Sarah Cox. Embedded C programming and Atmel AVR. Beijing: Tsinghua University publishing house, 2003.

    [3] Modicon.Modbus Protocol Reference Guide.1996

    [4] Zhu is beautiful, Jiang Nianping .ModBus agreement in industrial control system’s application. Micro computer information, 2006,4-1:118-120.

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    Monday, November 24th, 2008 at 17:39
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