The abstract in research existing LED demonstrated that in anode circuit’s foundation, proposed one kind transmits 8 serial bit demonstration data based on the IAP monolithic integrated circuit the LED display control system. Gives with based on this control system’s Data organization method corresponding hardware circuit. Explains it practical application how take 256×64 the lattice bi-color LED display monitor as the example. Simultaneously gives the corresponding software source program; And carries on some preliminary discussions to the LED display monitor’s Data organization and the hardware circuit design.
Key word LED display monitor monolithic integrated circuit IAP technical control system
Because the LED display monitor it has consumes the electricity to be few, the service life is long, the cost is low, brightness is high, the breakdown are few, angle of view great, visual range far and so on characteristics, already became new generation’s information communication media tool. LED and LCD compare the most prominent characteristic are, brightness is high, the cost is low, and the screen size may put together the system according to the scene situation with the standard LED single disc. According to installs the position to be possible to divide into outdoor, half outdoor and indoor; May divide into the single color, the double primary color according to the color and colored; May divide into φ5.0, φ3.75 and φ3.0 and so on according to a light emitter diode distance. This article take the market in the common indoor bi-color LED single disc as the controlled member, explains based on monolithic integrated circuit IAP the technical LED display monitor control system principle of work as well as the Data organization method.
1 bi-color LED single disc hardware composition and principle of work
Common indoor bi-color LED single disc electric circuit diagram as shown in Figure 1(a). And the line-scan circuit (3-8 decoders) constitutes by 2 piece of 74HCl38 4-16 decoders add on many 4953 (the MOS tube) to compose, the scanning way is 1/16. On the second half screen realizes red, the green demonstration data row input separately by 2 groups with the 74HC595 serial shift register, in shown in Figure 1(a) 64×32 in the standard LED single disc, in each group of serial shift register has 8 74HC595 cascades, 4 groups have used in common 32 74HC595. 74HC595 internal circuit diagram as shown in Figure 1(b). All 4 group of 74HC595 control signal RCK, SCK, EN meet completely in the same place. the 74HC595 control signal and 4 group of serial shift register’s input as well as line scan control signal A, B, C, D constitute the entire LED single disc input; 74HC595 control signal after actuation and 4 group of serial shift register’s output as well as passes by the overdrive scanning control signal A, B, C, D to constitute the entire LED single disc output, uses in the cascade next LED single disc the input. Bi-color LED single disc equivalent circuit diagram as shown in Figure 1(c).
2 LED display control system’s hardware composition and principle of work
LED display control system’s hardware composition as shown in Figure 2. Superficially is an ordinary monolithic integrated circuit applies simply, in fact when designs this system had already considered many hardware, the software and the hard software coordination factor. First in uses under 51 monolithic integrated circuit’s premises, as if may the shift pulse which sends out using the monolithic integrated circuit send in with its serial port way O 8 bit data in 74HC595, but must realize Figure 2 8 bit data at the same time input to add other auxiliary chips, moreover does not have what advantage in the reduction data transmission time. Next, uses FPGA, CPLD and so on programmable chip to design the special hardware electric circuit and the monolithic integrated circuit connection may enhance the data transmission large scale the speed, but cost also synchronized large scale enhancement.
In shown in Figure 2 in the system has used the following design idea:①Outputs 8 bit word lattice data by the P0 mouth synchronization.②Produces the SCK signal with P3.6, in the software the corresponding use “MOVX@R0, A” the instruction, while forms the SCK signal to reduce the instruction the byte count.③By P2.0 to the P2.3 output line scan signal, in the software A, B, C, D deposits in DPH low 4.④RCK and EN by P3.4, P3.5 control separately.⑤SST89E516 monolithic integrated circuit’s serial port and PC machine correspondence. Font data which and control procedure needs using this monolithic integrated circuit’s IAP function downloading demonstration.
3 LED display control system’s Data organization and the software optimize
LED display control system’s Data organization as shown in Figure 3. May obtain from Figure 2 from looks at the display line which and the demonstration data position as well as the color corresponding relationships directly shown in Figure 3(a). In order to enhance the data the reading speed, will demonstrate that the data carries on the serial arrangement according to the scanning line, may obtain the memory cell which and the scanning line, the memory cell data position and the color relations shown in Figure 3(b).
When concrete programming may carry on according to following step:①Will prepare the good address which scans to deliver the P2 mouth in low 4.②Treats the display line corresponding memory cell the DPTR direction the first address.③Take DPTR as the indicator, the use “MOXCA,@A DPTR” reads the demonstration data, and will demonstrate that the data delivers the P0 mouth.④Produces SCK through P3.6, simultaneously DPTR adds 1.⑤Redundant②,③,④Demonstrated until a line of data finishes, will produce RCK through P3.4 a line of data demonstration which moved in through the shift register.⑥Redundant②,③,④,⑤Demonstrated completely until 15 lines of data finishes.⑦Redundant①~⑥Refurbishing demonstration.
According to the above programming step, may very easy write demonstrates ith line of subroutine l. The subroutine 1 3rd line to the 9th behavior loop body, delivers 1 byte demonstration data altogether to need the lO machine cycle, the machine code byte count is 11. Through analyzes 74HC595 SCK is the rise along effective, the available monolithic integrated circuit writes a letter number (WR) to replace, therefore in the subroutine l 5th, 6, 7 lines of 3 instructions available “MOVX@R0, A” an instruction replaces, the experiment indicated that such replace is reliable. Demonstrated that the ith line of subroutine 2 after the replace procedure, deliver l byte demonstration data to need the machine cycle to reduce is 9, the machine code’s byte count reduces is 6. After demonstrating again ith line of subroutine 2 careful analyses discovered that in only uses SST89E516 internal 64 KB the Flash memory as the demonstration data storage, and does not increase under auxiliary circuit’s premise, only then the subroutine 2 7th line “DJNZ RO, DP1″ this 2 machine cycle 2 byte instructions, may use SST89E516 internal 64 KB the Flash memory major characteristic, direct simple redundant 256 second sons procedure 2 3rd, 4, 5, 6 line of 4 single byte instruction, thus may reduce 2 machine cycles the time. Like this delivers 1 byte machine cycle to be possible to reduce is 7, but the procedure needs to increase l KB. To 64 KB F1ash memories, the procedure increases 1 KB not to be able to reduce how many demonstration data. 1 compares with the subroutine, the subroutine 3 speeds enhanced 30%. 12 MHz crystal oscillators in shown in Figure 2 and uses SST89E516 time of fast function, its 1 machine cycle for O.5μs, in neglects other data processing time under the premise, demonstrated that the l screen complete data needs the time approximately is: (7×O.5μs×256 row ×16 line) =14.336 ms (each second nearly 70). The experiment indicated: The human eye starts to the LED display monitor to feel the twinkle approximately for each second 55, namely each time 18 ms. From Figure 2, chart 1(c) and 3 sub-procedures may see, a demonstration data has the following several characteristics in the memory arrangement:①Arranges in turn according to the scanning line scan’s order successively;②Arranges in turn in each line according to data output’s order successively;③Causes each demonstration data output through the hardware and software’s optimization the time to be shortest.
4 based on IAP function demonstration data transfer and PC software programming
The SST89E516 monolithic integrated circuit may realize IAP (In Application Programming) is because it divides into the Flash memory 2 blocks (region): block0 (64 KB) and blockl (8 KB). May cause the procedure through the IAP instruction’s cut to carry out in these 2 blocks, if the procedure the movement may carry on rewriting in block0 to the bleckl data, similarly the movement may carry on rewriting in block1 to the b1ock0 data. Uses when specifically the IAP function makes the following assignment to the SST89E516 monolithic integrated circuit’s 2 blocks:①On when electricity or replacement moves automatically in the block1 IAP procedure, if in 2s has not received PC machine through the serial port transmission data transmission instruction, then starts to move in the blockO display sequence.②in block0 lowest 8 KB uses in depositing the display sequence, other 56 KB uses in storing the demonstration data.③Moves the IAP procedure when blockO only cleans using the SST89E516 monolithic integrated circuit 128 byte small sector cleaning function and rewrites in blockO 56 KB to use in storing the demonstration data the region, the 8KB depositing display sequence region maintains invariable.④When block0 movement display sequence monolithic integrated circuit serial port monitor from PC machine replacement order, if has the replacement order to carry out the IAP instruction to cause the procedure to shift and moves in the blockl IAP red-tape operation demonstration data to the block1 block.
The PC software programming uses VB. This procedure may complete the font the extraction as well as the demonstration data organization, produces Intel the form the HEX document, downloads through the serial port to the SST89E516 monolithic integrated circuit. For the convenience control, from has defined 8 byte demonstration sets of instructions [the order (1 byte) the parameter list (7 bytes)], each kind of different demonstration effect needs the parameter, like the start address, the end address, each line of lengths and the tell time and so on, assigned its depositing instruction in the parameter list. The demonstration set of instructions deposits, in the demonstration data area most starts in l page of 256 memory cell, the first floor monolithic integrated circuit moves when may realize the different demonstration effect according to the display command, like the picture cut, fixed time, the level migration, the vertical migration as well as other demonstrate the effect specially. Similarly may through the IAP downloading display sequence.
Conclusion
Through the massive practice examination, this control system is very reliable, uses this control system manufacture the small LED display monitor to reach dozens, longest already moved above for 3 years. Has also made various improvement in the movement process to this control system. For example, to further raise the demonstration speed to be possible to expand exterior RAM, namely falls “CLR A” in the subroutine 3 foundations the instruction, causes the machine cycle to reduce is 6; Uses the instruction is 1 machine cycle monolithic integrated circuit and raises the crystal oscillator frequency; (For example DS89C450) has the DPTR automatic Canada 1 function using some 51 monolithic integrated circuits; In addition uses the hardware address generator which CPLD makes and so on. But all improvement’s measure is take increase outside the auxiliary circuit or the cost as the price. This control system’s price does not surpass 30 Yuan according to the market price, therefore it has the broad application prospect in the small LED display control system.
