The video frequency supervisory system is the train station, the airport, the bank, the recreation area, the shopping center even family security’s important module. Increases along with the security risk, increases sharply to the visual surveillance and the record event’s demand by many kinds of use patterns. Therefore, the new construction must the numerous and diverse video frequency supervisory system request cost benefit plan provide the extendibility day after day for the spread-eagle one whole set.
The going on the market time’s pressure, the new CODEC standard, the widespread request (including advanced target detection, movement survey, target tracking and target tracking characteristic), these is day by day the new video frequency monitoring construction faces in the challenge several items. Those who follow the challenge to come is to may expand the demand which realizes for the different performance range.
Regarding from the low end to the high-end as well as from the single plane to the PC expansion card’s any video frequency supervisory system, Xilinx FPGA is the ideal solution.
Video frequency monitoring and DVR system
In digital supervision system’s digital video videocorder (DVR) is using the advanced digital video compression rapidly. The majority DVR manufacturers from MPEG4 to H.264 the high definition (HD)CODEC shift, also increase to a higher resolution and the compression speed’s demand along with it. Special-purpose chip (ASSP) is very useful to the mass application, but lacks the flexibility, the development cost is high, moreover the development time is long; The majority high-level digital media processor can only carry out H.264 the HD decoding (, but H.264 the HD code must be much more complex than decoding). Satisfies H.264 the HD performance requirement the best solution is uses FPGA to add on exterior DSP or the digital media processor.
Uses the low cost Xilinx FPGA, may the further provide the movement survey, the video frequency reproduce by pantograph, the color space to transform, the hard disk connection and the DDR2 memory interface, but may also two 27-MHz ITU-R BT656 data stream to a 54MHz data stream, simultaneously be multiplex the DSP processor provides the video frequency acceleration. Must two ITU-R the BT656 data stream to ITU-R in the BT656 data stream, only need a channel video frequency port to come multiplex to transmit independently the complete two channel video data. Must video input port’s digital media processor provide the connection for only then ITU-R the BT656, this kind realizes the method to be useful. Shown in Figure 1 is this kind of kind of suggestion construction diagram.
Regarding uses Texas Instruments company DaVinci processor (only has ITU-R BT656 video input port) the DVR design, needs one kind more effective to realize the method two or more ITU-R BT656 data stream multiplex to a VLYNQ data stream, then can transport it to the DaVinci processor. Uses above realizes the method, you use to be less much the I/O pins to be able to transmit the video frequency class, moreover may reduce the system cost, because component’s seal may become is smaller. For this reason shown in Figure 2 the diagram which designs.
PC expansion card DVR system
The past for ten years, the PCI main line was PC has provided the very good service. However, now PC the expansion card DVR system requests the band width, greatly had already surpassed PCI main line degree in one’s power. (Strips off blank frame) after the compression video data approximately is 165Mbps. So, in the overall PCI band width is in the 1Gbps situation, you are most on a PCI main line can only mix with 6 without video frequency gathering which or the video frequency replay equipment compresses. You may use MPEG4 in the expansion card the CODEC chip set to reduce on main line’s band width, but this will increase the cost, and will enable you to be restricted existing MPEG4 chip set’s.
PCI the Express(PCIe) technology causes the current capacity large scale promotion. PCI Express decomposes into many channels. Each channel contains a difference in each direction to be right, this direction each difference to the data current capacity is 2Gbps. On motherboard’s each PCIe slot has own channel, these channels not with other any slot sharing. Various slots’ disposition is 16 channels (also calls x16), 8 channel (x8), 4 channels (x4) or 1 channel (x1). PCIe permits the data quantity which each card provides from x1 channel’s 2Gbps to x16 channel’s 32Gbps different. Had the PCIe data current capacity, you may get rid of each PCI card 6 not to reduce video channel’s limit.
The use and shown in Figure 1 the similar design, may through use PC to replace the digital media processor, and after the PCIe main line the video frequency class buffer to the PC method, with ease quickly realizes PC the expansion card DVR system. The video frequency modulus switch produces four independent digital ITU-R the BT656 class, then these class are sent in the low cost Spartan? - 3 components carry on the pretreatment. In FPGA, the video data strips off the blank frame and the synchronization, is the PCIe suitable pack, then feeds into Xilinx the PCIe essence. Then, the software may read and broadcast the input the video frequency, carries on processing to it, or stores up it the floppy disk. Shown in Figure 3 is the PC expansion card video frequency supervisory system design.
Xilinx video frequency and imagery processing algorithm
From the heterogeneity video frequency switch, the two-dimensional FIR filter and the screen demonstrated that to the cover and the alpha mix and so on simple effect, arrives at the form and the color space again transforms, Xilinx FPGA is the real-time digital video, the imagery processing and filter’s ideal platform. Table 1 has listed some commonly used video frequency IP module group’s application guide.
Xilinx FPGA unequalled DSP handling ability means that has the possibility to support the very high resolution (picture nature to reach as high as 1080p), and may reduce the large-scale DSP array the size. Xilinx FPGA is the hardware which may program, had it, you have been able with ease to attempt novel, the high performance, based on hardware’s video frequency and the image algorithm, received gets quick results the effect, caused your final product to be out of the ordinary.
Ready-made IP
Xilinx has provided the video frequency IP module group, supplies in the video frequency supervisory system the fast design, the simulation, to realize with the confirmation video frequency and the imagery processing algorithm. And includes designs the basic element which and the high-level algorithm DVR uses.
In addition, Xilinx and the partner has provided a series of compressed encoding, the decoding and arranges the decoding solution, from for the human who needs to realize fast provides the ready-made essence, yizhi dao causes the own for the hope through high grade and the low bit rate product out of the ordinary person to provide the structure module reference design and the hardware platform.
Uses in Xilinx FPGA certain arranging in the decoding module the extremely arduous processing duty, means that you may support the multichannel HD code, saves the precious system processor cycle, or removes the DSP processor array through the reduction to save the cost massively, and with ease multi-purpose and ability integrates from the connection to further video processing to the system. Most importantly, FPGA has provided the expandable solution, can thus support the different disposition, the extra channel in the same system or new arranges the decoding plan.
Xilinx FPGA may and realizes the new peripheral device through the strengthened system logic to further reduce the DVR system cost. Xilinx and the partner also provides the system connection for the video frequency supervisory system’s fast development: Advanced memory interface, PCI Express, Texas Instruments’s VLYNQ and EMIF connection, hard disk connection and ITU-R BT656 connection.
The Xilinx tool simplifies the design
Xilinx System Generator for the DSP permission uses Xilinx the video frequency IP module group to construct and to debug in Simulink the high performance DVR system. Uses System Generator to develop and to realize the video processing algorithm, may obtain the design which passes through confirms thoroughly and may with ease carry out.
Xilinx has developed each kind of process pre-test the new video frequency IP module group. You may through drag and drop and drop the module in System Generator to come the relaxed construction video frequency/phantom system, thus saves with the HDL language compiles these to construct the module basically the valuable time.
In order to process from the development board to the PC huge video frequency data stream, System Generator for DSP introduced another kind of novel high speed hardware coordination simulation (to pass ethernet connection). This kind of connection allows the low detention the high current capacity, the fact to prove that it regarding environment constructs the video frequency/phantom system in System in the Generator to be extremely useful.
Another kind based on the MATLAB language’s design tool is Xilinx the development AccelDSP synthesis tool, this is based on the high-level MATLAB language tool, uses in is Xilinx FPGA designs the DSP module. This tool may realize the floating point to the fixed-point automaticswitching, can produce VHDL which or the Verilog language may synthesize, and may test the platform for the confirmation foundation. You may also use the MATLAB algorithm to produce the fixed-point C model or System the Generator module. AccelDSP is Xilinx XtremeDSP? A solution’s essential module, its collection most advanced FPGA, designs the tool, the intellectual property rights essence, the partner relations as well as the design and the education serves a body.
Conclusion
In the video frequency supervisory system, the video signal produces by many cameras. FPGA receives ITU-R from the video frequency decoder the BT656 form the digital video, will then carry on the demonstration after the processing video output monitoring device, after simultaneously outputs it the digital media processor or DSP carry on the compression, stores the hard disk.
Using Xilinx FPGA, you may cause your meet standards the system to be different with the competitor the product, simultaneously still obtained the optimum balance for yours application. Using the Xilinx video frequency IP module group, you may with ease construct have highly the flexibility and the extendibility DVR system, thus both satisfies the low end market and to satisfy the high-end market. Through integrates the PCIe essence and the video frequency IP module group together, you may develop the low cost the PC expansion card video frequency supervisory system. Uses in Xilinx FPGA the VLYNQ essence, you may come from many camera’s numerous video frequency class through Xilinx FPGA with ease to connect TI the DaVinci processor.
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AccelChip and the Xilinx System Generator integration favors the algorithm exploiter the graph design cycle which comprehensive and system engineer and the hardware designer uses based on the MATLAB algorithm to unify. It uses the rich MATLAB language and the supplementary toolbox founds complex DSP algorithm System Generator the IP module. Uses these tools through the merge, the design team may to realize uses hardware modelling this most effective method, thus lets the algorithm exploiter participate in FPGA completely the design process, and completes a higher quality design quickly.
