Abstract: Introduced the active power factor adjusts the principle of work and realizes the method, and aimed at each kind of adjustment technology the characteristic to carry on the contrastive analysis. Afterward analyzed the work to modulate under the pattern continuously emphatically the pressure-rise active power factor adjustment technology, and has provided the complete design proposal. The experiment indicated that applies this project design the power factor compensating circuit to be possible to enhance stably the power factor to 0.99 above, and drops to the total harmonic distortion below 10%. Finally has given experiment’s data and the partial profiles.
Key word: Active power factor adjustment; Continual modulation pattern; Total harmonic distortion
Introduction
The tradition through did not control the rectification gain DC voltage from the 220V exchange electrical network the method to obtain the extremely widespread application in the electric power electronic technology, its merit lay in the structure to be simple, the cost was low, the reliability was high. But this kind does not control the rectification to enable the input current profile to have the serious distortion, assumes located at the voltage peak value nearby pulse shape, includes the massive harmonic components. On the one hand causes the serious pollution to the electrical network, disturbs the other electronic installation’s normal work; On the other hand also greatly reduced the entire electric circuit’s power factor, usually can only achieve 0.5~0.7.
Solves this question means is carries on highly to the current pulse suppresses, causes the current waveform as far as possible close sine wave, this technology namely adjusts (Power Factor Correction) for the power factor. The power factor (PF) is refers to the active power (P) and the apparent power (S) ratio, namely:
Therefore, the power factor may define as the electric current distortion factor (Gamma) and the phase-shift factor (cosΦ) product.
The power factor adjustment technology, realizes the method from it saying that is causes the electrical network input current profile to track the electrical network input voltage profile completely, causes the input current profile for the sine wave (γ=1), and with voltage waveform with phase (cosΦ=1). In the ideal situation, may rectifier’s load equivalent be a pure resistance, this time’s PF value is 1.
The power factor adjustment technology may divide into passive and the active two kinds approximately, considered passive PFC the volume is huge, and the performance is bad, therefore this article only aims at the active power factor to adjust (APFC) the technology to make some method discussion.
1 APFC technology realizes the method and the characteristic
1.1 APFC electric circuit’s basic structure
1.1.1 voltage dropping types
If UC3871, because its noise is big, the filter are difficult, on the power switching valve’s voltage stress is big, the control actuation level easy to fluctuate, therefore very few is used.
1.1.2 liter/voltage dropping types
Like TDA4815, TDA4818, must use two power switching valves, on a power switching valve’s actuation control signal fluctuation, the electric circuit is complex, therefore is short is used.
1.1.3 instead stir up-like
If ML4813, the output and the input isolate, the output voltage may the arbitrary selection, use the simple voltage control, is suitable below 150W the low power application situation.
1.1.4 pressure-rise -like
This method is widely used, its characteristic for the simple current mode control, the PF value is high, THD is small, the efficiency is high, but the output voltage is higher than the input voltage. Is suitable in the 75~2000W power range application situation, the application is most widespread. It has the following merit: In electric circuit’s inductance L is suitable for the current mode control; Because the pressure-rise APFC pre-regulating action maintains a high voltage on output capacity C, therefore the electric capacity C volume is small, the stored energy is big; Maintains the very high power factor at the entire exchange input voltage range of variation internal energy; The input current is continual, and is small in the APFC switch instantaneous input current, easy EMI filter; Pressure-rise inductance L can prevent the voltage, the electric current transient, enhanced electric circuit’s reliability.
Figure 5
In 1.2 APFC electric circuits input current control principle
1.2.1 average current modes
Like ML4832, UC3854, the operating frequency is constant, uses modulates the pattern continuously (CCM), work profile as shown in Figure 1. This kind of control mode’s merit is the permanent frequency control; The work in the inductance electric current continual condition, the switching valve electric current effective value is small, the EMI filter volume is small; Can suppress the switch noise; Input current profile low distortion. The major object is the control circuit is complex; Must use the multiplier and the divider; Must examine the inductance electric current; Needs the current control ring circuit.
1.2.2 peak value current modes
Like ML4831, MC34262, the operating frequency is constant, CCM, work profile as shown in Figure 2.
1.2.3 lag current modes
If CS3810, the operating frequency variables, CCM, the electric current achieves in the lag belt to have the power switch’s breakover or the shutdown, causes the input current rise or the drop. Its current waveform mean value is decided by the inductance input current, work profile as shown in Figure 3.
1.2.4 voltage follow-up control
Like ML4813, SG3561, the operating frequency variables, uses modulates the pattern not continuously (DCM), its work profile as shown in Figure 4. DCM uses the follower the method, has merit which the electric circuit simple, easy to realize, but also has the following shortcoming: Power factor and input voltage Vin and output voltage VO ratio Vin/VO related, namely, when Vin change, power factor PF will also change, simultaneously Vin/VO increases causes the input current profile THD to increase; Switching valve’s summit current big (in same capacity situation, in DCM through switching valve’s summit current is CCM 2 times), thus causes switching valve’s loss to increase. Therefore, in the high efficiency application situation, has the superiority based on CCM way APFC.
2 CCMAPFC electric circuit’s design method
May know based on above each kind of plan’s characteristic analysis, in the 75~2000W power’s application situation, the choice work in modulates under the pattern the average current mode BoostAPFC electric circuit to realize continuously is more suitable. In the concrete circuit design, the control chip selects UC3854A (its internal structure to see Figure 5), this is a section of high power factor adjustment integration control circuit chip which Unitrode Corporation produces, its peak value switch electric current approximately equal input current, is minimum to the transient state noise’s response, is a section of ideal APFC control chip.
2.1 technical specifications
Input voltage Vin=AC 150~265V;
Output voltage VO=DC 400V;
Supply frequency f=47~65Hz;
Output PO=2kW;
Turn-on frequency fs=50kHz.
2.2 turn-on frequencies
The turn-on frequency high may reduce the PFC electric circuit’s structure size, enhances the power density, reduces the distortion; But the frequency will be too high will increase the switching loss, will affect the efficiency. In the majority applications, the 20~300kHz turn-on frequency is a good compromise. In this design the turn-on frequency choice is 50kHz, such inductance quantity’s size is reasonable, the peak low distortion, the inductance physical size is small, MOSFET and on the Boost Diode power will consume excessively will not be many. In the high power PFC design, cuts the turn-on frequency to be possible suitably to reduce the switching loss. Oscillator’s operating frequency (1) decided by the type.
2.3 Boost inductance choice
The inductance had decided the input current ripple’s size, its inductance quantity gives by the stipulation ripple electric current.
The biggest summit current appears in the smallest circuit voltage peak value place, and (2) assigns by the type.
In inductor’s peak - peak value ripple electric current, usually choice in about biggest peak value line current 20%, namely
2.4 output capacity’s choice
When choice output capacitor should consider the following factor: Turn-on frequency ripple electric current, second harmonic electric current, direct-current output voltage, ripple output voltage and maintenance time and so on.
After the maintenance time δt is refers to inputs the power source closes, the output voltage still maintained in the prescribed limit the time length, its typical value is 15~50ms generally, under this principle, the selection electric capacity must guarantee
2.5 switching valves and pressure-rise second-level tube’s choices
The switching valve and the pressure-rise diode must have the enough specified amount guarantee circuit’s reliability service. Switching valve’s nominal current must be bigger than in the inductance the electric current biggest peak value, and leaves leeway certain allowance, regarding the pressure-rise diode is also same. Pressure-rise diode’s trr must enough small reduce the switching valve clear instantaneous loss, simultaneously causes diode’s loss to reduce. In order to reduce diode’s trr, may use two 300V to restore the diode series connected method quickly, and on the high resistance number’s resistance maintains the voltage is balanced.
2.6 electric current examination resistance choice
Generally chooses 1V the resistance drop, both may have the good anti-noise ability, and will not have the too big loss.
2.7 multiplier’s establishments
The multiplier is the core which the power factor adjusts. Multiplier’s output takes the electric current link regulator’s input, by obtains the high power factor through the control input current. Therefore, multiplier’s output is an expression input current signal, its expression is
In the formula: IMO is multiplier’s output current;
IAC is multiplier’s input current;
VVEA is the voltage error amplifier outputs;
Vff is the forward feed voltage;
KM is equal to 1 constant.
Figure 6
2.8 current control ring circuit’s design
The electric current link split-ring for the first-order integral system, as shown in Figure 6. In order to cause the system to move stably, must carry on the compensation to the current loop. Current regulator’s zero spot must be in or be smaller than biggest cut-off frequency fCI, this time the system just has 45° phase angle allowance. In order to eliminate the system in the turn-on frequency place to the noise the sensitivity, should introduce an extreme in the current regulator, the extreme frequency is 1/2 turn-on frequency, when the extreme frequency is bigger than 1/2 turn-on frequency, the extreme will not have the influence to current loop’s frequency response. Therefore when designs the electric current link should satisfy the following characteristic:
1) the electric current link split-ring for the first-order integral system, should have the high low-frequency gain to reduce the static error as far as possible;
2) the ring circuit should have as far as possible the high traversing frequency, realizes the fast followed;
3) the ring circuit should present the weaken characteristic in the turn-on frequency place, eliminates in ring circuit’s switch noise;
4) the ring circuit should have the enough stability margin, enables the electric circuit to have the strong robustness.
Table 1 empirical datum
| AC Input (exchanges input end) | DC Output (direct-current out-port) | THD (total harmonic distortion) | ||||||
| Vrms/V | Ifund/A | Pin/W | PF | Vo/V | Io/A | Po/W | η/% | THD/% |
| 150 | 3.47 | 518 | 0.992 | 396.9 | 1.25 | 497 | 95.86 | 10.03 |
| 220 | 2.36 | 516 | 0.993 | 396.7 | 1.25 | 497 | 96.37 | 8.79 |
| 265 | 1.95 | 514 | 0.993 | 396.5 | 1.26 | 498 | 96.88 | 8.92 |
| 150 | 5.98 | 895 | 0.995 | 396.5 | 2.15 | 853 | 95.36 | 6.39 |
| 220 | 4.07 | 891 | 0.993 | 396.3 | 2.16 | 856 | 96.11 | 8.66 |
| 265 | 3.34 | 888 | 0.992 | 395.9 | 2.17 | 858 | 96.67 | 9.98 |
| 150 | 7.12 | 1066 | 0.992 | 395.8 | 2.57 | 1017 | 95.44 | 9.93 |
| 220 | 4.81 | 1059 | 0.991 | 395.6 | 2.58 | 1021 | 96.45 | 10.88 |
| 265 | 3.99 | 1053 | 0.993 | 395.3 | 2.59 | 1024 | 97.23 | 8.99 |
| 150 | 10.41 | 1556 | 0.992 | 395.1 | 3.76 | 1484 | 95.36 | 10.01 |
| 220 | 7.05 | 1541 | 0.994 | 394.8 | 3.78 | 1492 | 96.79 | 7.78 |
| 265 | 5.87 | 1535 | 0.994 | 394.7 | 3.79 | 1494 | 97.36 | 7.97 |
| 150 | 4.73 | 2197 | 0.992 | 394.5 | 5.32 | 2099 | 95.53 | 9.84 |
| 220 | 10.04 | 2184 | 0.993 | 394.3 | 5.37 | 2118 | 96.97 | 8.87 |
| 265 | 8.35 | 2175 | 0.995 | 394.2 | 5.39 | 2126 | 97.74 | 6.58 |
2.9 voltage control ring circuit’s design
Works stably for the electric circuit, must carry on the compensation to the voltage control link, but because the voltage control ring circuit’s bandwidth ratio turn-on frequency must be small, therefore to the voltage control ring circuit’s request, is mainly to guarantee that the input distorts is smallest. First, ring circuit’s band width must be low enough, weakens on the output capacity the mains frequency second harmonic, guaranteed that the input current the modulation quantity is small; Next, the voltage error amplifier must have the enough phase-shift, enables the signal which modulates to be able with the input voltage to maintain the synchronism, thus obtains the high power factor.
The electricity pressure ring split-ring for the first-order integral system, as shown in Figure 7. In order to reduce the distortion which the second harmonic electric current causes, the voltage error amplifier must introduce an extreme to carry on the compensation, reduces the harmonic voltage the scope and provides 90° the phase-shift. The electricity pressure ring’s lowest cut-off frequency is
Its band width’s typical value is 10~30Hz, the phase angle allowance is 45~70°. In the actual design, to cause the output voltage the stability to be good, when selection cut-off frequency elected slightly high, the electricity pressure ring has slightly is bigger than 45° the phase angle allowance.
3 empirical data and profile
To used the above parameter design the APFC electric circuit to carry on the performance test, the input voltage scope is 150~265V, peak power output close 2200W, Figure 8, chart 9 and Table 1 has given the empirical datum and the part test profile.
The experiment indicated that applies the APFC electric circuit work which this plan designs to be stable, may complete the design requirements well: Input current’s spurt value followed input voltage’s spurt value, the current waveform approximate is a sine wave, and with the voltage waveform with the phase, electric circuit’s power factor (PF) achieves above 0.99, and total harmonic distortion (THD) <10%; When variation of load, directs current out-port’s voltage value maintains constant basically; When exchanges input end’s voltage changes, the operating power basically maintains constant.
4 conclusions
This article based on the Boost electric circuit analysis situs, uses modulates the pattern continuously (CCM) the average current mode control mode, chooses UC3854A to design the active power factor compensating circuit as the control core. The experiment proved that this plan above the medium grade in the power application, through disposes the circuit value reasonably, not only has obtained the stable direct-current output, and has realized the power factor adjustment.
This principle of design is similarly also suitable in other same type APFC control chip electric circuit realizes, and has the circuit structure to be simpler, the volume is small, work stable reliable and so on merits, in medium and compares under the high efficiency to carry on the power factor control in the situation to have the widespread application prospect.
