Frequency synthesis technology
The digital phase-lock type frequency synthesizer’s basic principle is: The application digital logic electric circuit the VCO frequency or the multiple frequency division to the discriminator frequency, compares again with the reference frequency in the phase discriminator, produces the error signal uses for to control the VCO frequency, causes it to lock in the reference frequency stability. Above principle as shown in Figure 1.
Figure 1 digital phase-lock type frequency synthesizer work schematic diagram
And the N frequency divider is by the monolithic integrated circuit programming control, therefore this kind of synthesizer has manifested the programming and the phase lock technique union. Looking from the gross structure, it by the monolithic integrated circuit, the phase-locked loop and the programmable frequency divider three parts is composed.
ADF4113 synopsis
ADF4113 is one kind of direct digital frequency synthesizer, its highest operating frequency is 3.0GHz, the working voltage is 2.7~5.5V, may use in the radio base depot equipment, the wireless portable terminal and the signal detection equipment and so on, its exterior pin as shown in Figure 2.
Figure 2 ADF4113 exterior pin
1 principle of work
ADF4113 from external input signal only then standard frequency source signal and control signal. The standard frequency source signal inputs after the coupled circuit after ADF4113, after 14 R frequency dividers obtains the phase demodulation reference frequency to deliver the discriminator. Accuses in a written document the system signal by clock signal CLK, data signal DATA and enables signal LE to be composed. Under clock signal’s control, inputs 24 bit data signals by the serial port, deposits temporarily in 24 input registers. After receiving enables the signal, formerly input 24 bit data arrive at corresponding according to the address position the latch.
After ADF4113 receives the output frequency which feeds back, first through directs proportionality factor P in advance, after A, the B frequency divider, obtains the frequency division later feedback signal, inputs to the phase-lock. Will compare with the frequency division later standard frequency source signal in the discriminator, the output low frequency control signal will control exterior VCO the frequency, will cause it to lock in the reference frequency stability.
2 control words
The ADF4113 frequency division directs proportionality factor P and A, the B frequency divider in advance compared to N through the establishment realizes, algorithm for N=B×P A. The reference frequency obtains through the R frequency divider frequency division suits the discriminator the input, therefore has fVCO=[P×B A]×fREFIN/R. A frequency divider, the B frequency divider and the R frequency divider respectively are 6, 13 and 14, its value through writes the corresponding control register to realize.
The ADF4113 interior has four 24 control word registers, respectively is the R frequency divider control word, the N frequency divider, the initialization register and the function register. The R control word including the address control position, 14 R frequency divider’s value supposes the setting, the pulse width control position, the pattern test position, the fixed precision choice position, the mode selection position and guarantees retains. The N frequency divider control word including the address control position, 6 A frequency divider’s value supposes the setting, 13 B frequency divider’s value to suppose the setting, to lose goes too far the gain control position and guarantees retains. The initialization register control word including the address control position, the frequency divider supposes the setting, the power source to suppose the setting, the MUXOUT out-port control position, the PD polarity to suppose the setting, the out-port whether to suppose the setting, fast locking for the three states of matter output to suppose the setting, the timer to suppose the setting, the current condition to designate supposes the setting, as well as directs the proportionality factor to suppose the setting in advance. Function register and initialization register control word basic same, is only the low two bit address control position is different.
Hardware design
1 gross structure design
The control section needs the peripheral circuit including the clock reset circuit, the keyboard display circuit and with the ADF4113 interface circuit, control circuit structure as shown in Figure 3.
Figure 3 control circuit structure
2 keyboard display circuit design
Because uses the free standing keyboard I/O mouth resources to be insufficient, needs to use piece of 8255 expansions and the mouth. May its A, B do the keyboard entry, C makes the LED demonstration output. As the simplified design, the keyboard selects the inquiry method, electric circuit as shown in Figure 4.
Figure 4 keyboard display circuit
3 ADF4113 interface circuit design
The monolithic integrated circuit is writes the data through the serial port to ADF4113, including clock line (DATA), data line (CLK) and control signal LE, CE. LE, the CE control signal may provide by two I/O mouths, in addition needs the monolithic integrated circuit to provide a I/O mouth to examine the fixed signal. Interface circuit as shown in Figure 5.
Figure 5 ADF4113 interface circuit
When initialization, supposes LE for the low level. When 24 bit data send in ADF4113 by the monolithic integrated circuit after the serial port, when for a LE high level, like this inputs in latch’s 24 bit data along to lock the corresponding register in the CLK rise, after three byte data deliver, LE should restore to the low level. And, CE selects patches or strips of land as worth saving for seed the signal, low level selection; MUXOUT may through the software establishment be the ADF4113 locking signal out-port, the high level expresses locking.
Software design
1 keyboard entry
What this topic use is 16 free standing keyboards, the keyboard after 8255 A, B input, therefore 8255 working establishment is A, B enters, C says, and A, B work in the way 0, obtains the control word is 92H.
The keyboard selects the inquiry method, when examines has the key inputs, inquires and preserves the key numbers. The examination key input routine with the F0 marking position, has the key inputs when F0 to set “1″, jumps out the examination subroutine by this symbol, enters the inquiry subroutine. ResetFlag as the replacement symbol, mainly uses in has the circulation subroutine (for example frequency sweep and a frequency) in the dynamic demonstration, as “1″ the achievement jumps out the end of loop subroutine take its value the symbol.
2 LED demonstrations
The display circuit uses common cathode LED, it selects patches or strips of land as worth saving for seed the signal to provide by P1 mouth low four, the section code data by 8255 C outputs, selects the dynamic scanning method, demonstrated that the data saves in demonstrates in the buffer.
3 control words
According to the ADF4113 function control word structure, the function control word may suppose is 8D9112h. The monolithic integrated circuit delivers the control word to ADF4113 is realizes through the SPI serial interface. First 24 control word each byte according to from the top digit to the low position order, moves in ADF4113 the input register, after 24 move, for enables a signal LE high level, like this formerly input 24 bit data, according to the address position, arrive at the corresponding register.
4 frequency subroutines
Selects the function which the frequency subroutine must complete is based on input frequency f calculates the frequency division to compare N, and delivers the control word in ADF4113, examination locking signal, when locking demonstrates the input frequency.
5 frequency sweep subroutines
First loads the starting value to the timer (frequency sweep time-gap); Again establishment outset frequency fb, frequency sweep frequency interval f0 and upper frequency fe; Then start timer TR0=0, fixed time, the frequency adds the f0, TF0 reset to time, after establishment biggest frequency returns to the initial frequency again, so circulates to repositions the key to press down time stops.
6 master routines
The program execution (a frequency or frequency sweep) presses down the start by the functional key, when a little the frequency or the frequency sweep key press down, “-” prompts the input digit in the highest order LED demonstration, presses down the numeric keyboard “-” vanishing, starts to demonstrate the input the digit. Deletes the key to be possible to delete already the digit which inputs, returns to “-” the prompt condition. Presses down confirmed that the key enters the corresponding subroutine; Presses repositions the key to be possible to jump out various subroutines, restores to the original state. Master routine flow as shown in Figure 6.
Figure 6 master routine flow chart
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