The abstract adds our type to TMS320C6000 series DSP several kind of start load plan’s EMIF to carry on the detailed analysis. Then take TMS320C6713 DSP as the example, proposed that one kind the direct firing writes Flash in the master routine the means that and carries on the comparison with the commonly used FlashBurn tool. The experiment proved that this DSP start load plan easy to realize, is more convenient than reliably the traditional method use.
Key word TMS320C6000 starts Canada to plant Flash EMIF
Introduction
Along with the recent years digital signal processor (DSP) technology’s rapid development, it more and more widely applied in with in people economy each domain. And, TI Corporation promotes TMS320C6000 the series DSP component is in many needs to carry on the massive digital signal processing to operate and gives dual attention to the high timely request the situation to be able to apply. TMS320C6000 in the series DSP system design process, the DSP component’s start load design is one which of questions difficult to solve.
C6000 the series DSP start load way including does not load, the main engine load and EMIF loads 3 kinds.
3 kind of load way comparison: Does not load the way to be restricted in the memory 0 addresses is not only need map the RAM space the component, otherwise before RAM space initialization CPU will read the invalid code to cause the mistake; The main engine loads the way to request to have an exterior main engine to control DSP the initialization, this will increase system’s cost and the order of complexity, is realizes with difficulty in the actual situation; EMIF load way’s DSP and the exterior ROM/Flash connection is more free, but on piece Bootloader tool automatic removal code quantity limited (1KB/64KB). This article main discussion commonly used EMIF load way.
1 EMIF load analysis
In practical application, what usually uses is the EMIF load way, deposits the code and the data sheet in the exterior nonvolatile storage (often uses the Flash component).
Below take the TMS320C6000 series in newest floating point CPUTMS320C6713 (i.e. “C6713″) as an example, multianalysis its EMIF loads the software and hardware realizes.
The hardware aspect, it with 16 bit width’s Flash component’s connection as shown in Figure 1.
Regarding the different DSP component, the load way’s disposition pin has the difference slightly. The C6713 disposition pin and definition like table l arranges in order.
The application procedure’s size has decided on the piece Bootloader tool whether enough all code removal to internal RAM. Regarding C6713, on the piece Bootloader tool can only move into 1 KB code internal RAM. Usually in the situation, the user application procedure’s size can surpass this limit. Therefore, needs scope to deposit a young Duan procedure in advance before exterior Flash l in the KB, after waiting on the piece the Bootloader tool to enter this section of code removal the interior and starts the execution, by this section of codes realizes Flash in the surplus user application procedure removal enters in internal RAM. This section of codes may be called as simple second-level Bootloader.
Shown in Figure 2 for time use second-level Bootloader CPU moves the flow.
Uses second-level Bootloader to need to consider the following several items:
◇ needs to burn COFF which writes (public object file form) the section choice;
◇ compilation second-level Bootloader;
◇ will choose COFF Duan Shaoru Flash.
A COFF section is occupies a section of continual storage space procedure or the block data. The COFF section divides into 3 types: Code section, initialization data segment and initialization data segment.
To does the EMIF load way, needs to load the mirror image by the code section (for example .vectors and .text and so on) and the initialization data segment (for example .cinit, .const, .switch, .data and so on) constitutes. Moreover, may define .bootload alone section depositing second-level Bootloader. This section also needs to read in Flash.
All initialization’s data segment (for example .bss and so on) has not needed to burn into to Flash.
2 second-level Bootloader compilations
Because carries out time second-level Bootloader the C movement environment has not established, must therefore use the assembly language compilation. Second-level Bootloader may refer to other similar literature and the TI related documents. Here no longer gives unnecessary detail.
After CCS user project translation link, produces the .map document has contained memory’s detailed assignment information. In a typical map document contains memory assignment information like table 2 arrange in order.
Is different with the cmd document, which section of memory space information has the map document not only contained each section of memories, from the map document may also know specifically in each memory sector has how many to use by the reality (fever writes when Flash will use this parameter). In the memory sector has not been used the part not to need to read in the Flash content, actual the part which uses is needs to read in truly in Flash the content.
3 Flash fever write
And so on reads in Flash the code the means to be possible to divide into the following several kinds on the whole:
①Uses the general fever to write reads.
②Uses the FlashBorn tool which in CCS brings.
③User compile the fever to write Flash the procedure, reads in by DSP the memory reflection Flash.
And, the use general fever writes the fever to write needs to transform the memory reflection into binary or the hexadecimal system form document, moreover requests the Flash component is may insert pulls out the seal. This will cause component’s volume to be big, brings inconveniently for user’s design.
Uses the FlashBurn tool’s advantage which TI Corporation provides to lie, the use is more direct-viewing. The FlashBurn tool provides the graphical interface may conveniently to Flash operations and so on execution cleaning, programming and examination content. But this method’s shortcoming also many: First, the FlashBurn tool moves when needs to download a .out mirror image (FBTC, FlashBurn Target Component) to the DSP system, then by superior PC machine through simulator sending a message (instruction and data) for lower position DSP, makes concrete to the Flash operation carries out by FBTC. However, this FBTC is generally aims at DSK which TI Corporation provides to compile specially, uses the Flash connection width with the board on (default is 8), the operation key words (different varies because of production manufacturer) concerns, therefore, manufactures to user hardware not necessarily suitable. For example: What if on user own circuit wafer uses is with DSK the same brand Flash chip, the connection is 16 bit data widths, that will use the FlashBurn tool fever to write will be most only then half Flash capacity to be able to use, if wants to realize EMIF to load correctly must choose 8 load ways. This has created the Flash memory resources waste, simultaneously has limited the user development flexibility.
Although TI Corporation provided the FBTC source code for to have the need user revision, but such user need understood that FBTC the operational mechanism and with the superior machine communication protocol, and wrote the function to the Flash fever to make the revision. The user possibly needs to revise several places are as follows: To Flash programming key words and address, in BurnFlash function data indicator and EMIF mouth disposition (in view of 1.0 edition FBTC). This gave the user the development to bring inconveniently. Development time waste, in understood that did not calculate the simple F1ash fever writes on the tool is not a good choice.
Next, the F1ashBurn tool cannot distinguish the .out document, only accepts .hex the hexadecimal system document, therefore, needs the .out file conversion to be the .hex document. This transformation’s tool is the Hex6x.exe tool which TI Corporation provides. Switching process’s at the same time, needs a cmd document (i.e. Figure 3 Hex.cmd) to assign to take the input the .out document, the output .hex document form, on the board the Flash chip type and the size, needs to read in Flash COFF Duan Ming and so on.
Use user compile the fever wrote Flash the procedure to be more nimble, has avoided tedious which the document format transformed. However, this method request user is more familiar to own use’s Flash chip.
Usually uses the Flash fever writes the procedure is establishes a project alone the means: (Contains the user application procedure second-level Bootloader) to translate the first production the .out document to load to goal DSP system’s RAM, then writes the fever Flash on regulation translation production .out document to load to goal DSP the system RAM another address range, carries out the Flash fever to write the procedure, completes writes to the Flash fever. This means need to pay attention avoid the address cover which two loading possibly produce, prevented the 2nd loading to revise should read in the content which Flash 1st time loaded.
In fact, may write the Flash fever the procedure to insert to the user master routine code, establishes a fever to write Flash alone the project to be more convenient. The Flash chip’s fever writes the segment to be as follows:
The ChipErase function and the ProgramFlashArray function’s compilation may refer to the user use Flash chip Datasheet as well as the reference.
The ProgramFlashArray function’s 1st parameter is the source address pointer (aims at internal Ram), the 2nd parameter is the goal address pointer (aims at exterior Flash), the 3rd parameter is the data length which must read in (unit for character).
Compiles the Flash fever writes when the function has 3 points to need to pay attention:
①Aims at the Flash address the indicator. Because the C6713 low two bit address uses in decoding makes the byte choice, address bus’s most low position is EA2, therefore, the logical address needs suitable shifting to be able to aim at the goal correctly.
Speaking of 8 memories, should shift to the left 2; Speaking of 16 memories, should shift to the left l; Regarding 32 memories, then does not need to shift. For example must from (toward) the Flash 0×00000003 address read (writes) a character, its logical address should be 0×90000000 (Ox0003<<1), but non-0×90000003.
②in the map document various memories sector the size dimension which takes is actually take the byte as the unit, but the ProgramFlashArray function reads in Flash the Data unit is a character, therefore needs to obtain the map document in size dimension’s half take the ProgramFlashArray function the parameter.
③The fever wrote in the function to use the flash_burned constant achievement to judge whether needed to the Flash operation basis, and its initialization was 1. After this is to avoid Flash loads, carrying out to the Flash operation. This variable should when the fever writes Flash the manual revision is 0.
Under the simulation load way, may manual revise the flash_burned constant in the CCS watchwindow window is O, forces CPU to enter to the Flash programming segment. The experiment proved that manual revised flash_burned under the simulation load way not to affect reads in Flash flash_burn-ed the value (was still 1), therefore, read in Flash flash_burned the value was still l. After the system Flash load, CPU will jump over this section of codes, will realize the correct movement.
4 conclusions
This Flash load plan take C6713 as an example, revises slightly is then suitable for TMS320C6000 the series other DSP component. Passes through in the development servo tests in the platform the application, proved that this method practical and feasible and easy to realize, has avoided the object file form transformation, compared to the FlashBurn tool which usually used uses nimbly convenient, the user might through revise the Flash fever to write the function simply to cause it to adapt own hardware situation. Regarding the Flash component connection with the TI DSP inconsistent situation, this plan is a very good choice.
