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Thursday, September 4th, 2008 at 05:28 | No comments

Categories: EDA/PLD

Tags: FIR filter, FPGA

Short Content: 1 parallel running water structure FIR principle     When uses FPGA or the specific IC realizes the digital signal processing algorithm, the computation speed and the chip area are the subject matters which two restrict mutually. When practical application FIR filter, must obtain the good filter effect, filter's exponent number will obviously possibly increase, sometimes possibly will reach several hundred steps. Therefore, it is necessary, in the performance and realizes between the complexity to make the choice, is also the ...

Friday, August 22nd, 2008 at 16:56 | No comments

Categories: EDA/PLD

Tags: DSPBuilder, FIR filter, FPGA

Short Content: Introduction     In the intelligence signal treating processes, like to the signal filtration, the examination, the forecast and so on, must use the filter, the digital filter is the digital signal processing (DSP, DigitalSignalProcessing) uses the most widespread one kind of component. The commonly used filter have the infinite long unit pulse response (ⅡR) filter and finite unit pulse response (FIR) filter two kind of [1], the FIR filter can provide the ideal linear phase to respond, obtains the constant ...