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Based on SRAM may the reshuffle electric circuit
Tuesday, November 25th, 2008 at 20:55 | No commentsCategories: EDA/PLDShort Content: Based on SRAM may reshuffle PLD (programmable logical component) the appearance, the PLD logical function has created the condition for the system designer dynamic change movement electric circuit. PLD used the SRAM unit to preserve the character the layout data to decide the PLD interior interconnection and the function, changed these data, also changed component's logical function. Because the SRAM data is volatile, therefore these data must preserve outside PLD component's EPROM, EEPROM or FLASH ROM and so on the ... -
Uses the new SRAM craft to realize embedded ASIC and the SoC memory design
Tuesday, November 11th, 2008 at 07:49 | No commentsCategories: StorageShort Content: The sharp weapon which has been in many embedded designs uses ASIC/SoC based on the traditional six transistor (6T) memory cell's static RAM memory block to realize the development personnel who uses, because of this kind of memory structure very suitable mainstream's CMOS technical process, not to need to increase any extra craft step. Like in chart 1a shows such, interwove basically the coupling latch and the active load unit has composed the 6T memory cell, this kind of ... -
ATmegal28 expands the 512KB power failure to protect SRAM the plan
Wednesday, November 5th, 2008 at 11:49 | No commentsCategories: StorageShort Content: The abstract introduced that one kind requests in view of timeliness to compare Gao Qie to process the data quantity big system's design and the development plan. This plan uses high performance AVRATmegal28 is its control core, realizes in 512 KB SRAM data which outside the visit expands, and in power failure time outside can protect expands in SRAM the data. When exterior power failure, forewarns the circuit protection field data in SRAM which expands to outside, by the lithium ... -
Based on SRAM and DRAM structure large capacity FIFO design
Tuesday, November 4th, 2008 at 10:49 | No commentsCategories: StorageShort Content: Abstract: Separately based on Hynix Corporation's SRAM HY64UDl6322A and DRAM HY57V281620E, introduced uses two kind of different RAM structures, designs and realizes the large capacity FIFO method through CPLD.Key word: SRAM; DRAM; CPLD; Large capacity FIFO 1 introduction FIFO (First In First Out) is one kind has advanced leaves the memory function the first part, usually serves as the data buffer in the middle of the high speed figure system. In high speed data gathering, the transmission and in the ... -
Based on DBL structure embedded 64kb SRAM low power loss design
Tuesday, October 21st, 2008 at 13:57 | No commentsCategories: StorageShort Content: Abstract: In view of embedded system's low power loss request, uses the position line division structure and the memory array piecemeal decoding structure, has completed 64 kb the low power loss SRAM module design. Compared with the general layout's memory, uses these two kind of technologies to cause memory's power loss to reduce 43%, but the area only increased 18%. Key word: Memory; SRAM; Position line division; Piecemeal decoding The embedded memory's capacity and the area which occupies in the system chip ... -
FPGA and SRAM unify complete the large capacity data storage
Wednesday, October 15th, 2008 at 16:54 | No commentsCategories: StorageShort Content: 1 introduction Along with the digital signal processing technology's unceasing development, the large capacity programmable logical component's unceasing emergence, the FPGA technology more and more applies in the large scale integrated circuit design. In this hardware system design, will meet frequently needs the large capacity data storage the situation, below we will aim in FPGA internal Block the RAM limited shortcoming, proposed will unify FPGA with exterior SRAM improves the design the method, and has given the part VHDL ... -
With realizes - en.51rd.net based on FPGA and the SRAM numerical control oscillator’s design
Wednesday, August 20th, 2008 at 14:56 | No commentsCategories: EDA/PLDShort Content: Abstract: Introduced that the numerical control oscillator's principle of work, the key elaboration realizes the numerical control oscillator's method with scene programmable gate array (FPGA) and static stochastic memory (SRAM), simultaneously gives uses this structural design the numerical control oscillator's characteristic and the performance.Key word: Numerical control oscillator (NCO); Search table; XC2V1000; CY7C1021; DesignChinese Library classification number: TN914.3 document code: A article serial number: 1006-6977(2006)01-0022yi03 1 introduction The numerical control oscillator is in the digital communication modulates the demodulation unit ...
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