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VHDL design example: A simple UART_UART, VHDL
Monday, January 11th, 2010 at 20:47 | No commentsCategories: EDA/PLDShort Content: -------------------------------------------------------------------- Copyright (c) 1992,1993,1994, Exemplar Logic Inc. All rights reserved.---------------------------------------------------------------------- This design implements a UART. ---- -- Version 1.1: Original Creation-- Version 1.2: Modified to std_logic types-- Version 2.1: Extended reset to be more effective.-- Introduced OTHERS clause.------------------------------------------------------------------ LIBRARY ieee;use ieee.std_logic_1164.all;use ieee.std_logic_arith.all;use ieee.std_logic_unsigned.all; ENTITY uart IS PORT (clkx16: IN std_logic; -- Input clock. 16x bit clock read: IN std_logic; -- Received data read strobe write: IN std_logic; -- Transmit data write strobe rx: IN std_logic; -- Receive data line reset: IN ... -
Realizes the UART core function one method with the FPGA component_FPGA, UART
Friday, January 8th, 2010 at 23:43 | No commentsCategories: EDA/PLDShort Content: The serial peripheral device can use the RS232-C asynchronous serial interface, in the tradition to use the special-purpose integrated circuit is UART realizes, like TI, EXAR, EPIC 550, 452 and so on series, but we do not need to use complete UART generally the function, moreover or needs to encrypt the communication situation regarding the multi-serial port's equipment to use UART is not most appropriate. If designed uses the FPGA/CPLD component, then might need the UART function integrated ... -
PIC monolithic integrated circuit simulation asynchronous serial communication UART source program_UART, PIC
Wednesday, November 4th, 2009 at 19:53 | No commentsCategories: Embedded systemShort Content: Realizes with TMR0 fixed time inquires. Any belt interrupts on PIC may realize. The available this law expands many serial ports. ; |--------------------------------------------------------------|; | Implement duplex USART base on normal I/O pin |; | Using TIMER0 interrupt for bit timing |; | Tested on PIC16F83 running at 4MHz |; | Written by Paul Zhang, Microchip Tech Inc |; | 6 Aug, 2000 |; | All rights reserved |; |--------------------------------------------------------------| errorlevel -302 ; no bank warning errorlevel -301 ; ... -
One kind based on TMS320C55x DSP UART correspondence design
Tuesday, December 9th, 2008 at 13:56 | No commentsCategories: Communication NetworksShort Content: Abstract: The full-duplex asynchronous serial communication usually realizes the way on TMS320C55xDSP is adds the external connection chip using the DSP McBSP connection to realize, this design method increased has realized the UART hardware cost and the circuit design order of complexity. Proposed one kind directly realizes the UART method using the DSP MCBSP connection and the DMA channel, gave has used the C language and the CSL programming method. Realizes the method with the tradition to compare, has realizes ... -
Nucleus design with realizes - en.51rd.net based on FPGA UART the IP
Tuesday, November 25th, 2008 at 15:55 | No commentsCategories: EDA/PLDShort Content: Abstract: This article has designed one kind based on the FPGA UART nucleus, this nucleus conforms to the serial communication agreement, has the modulation, the compatibility and configurable, suits applies in SoC. In the design uses Verilog the HDL hardware description language environment to carry on the design, the simulation in Xilinx under the ISE, finally inserted UART on FPGA the IP nucleus to realize electric circuit's asynchronous serial communication function. Key word: IP nucleus; UART; Verilog HDL; FPGA ... -
Nucleus design with realizes - en.51rd.net based on FPGA UART the IP
Sunday, November 16th, 2008 at 17:12 | No commentsCategories: EDA/PLDShort Content: Abstract: This article has designed one kind based on the FPGA UART nucleus, this nucleus conforms to the serial communication agreement, has the modulation, the compatibility and configurable, suits applies in SoC. In the design uses Verilog the HDL hardware description language environment to carry on the design, the simulation in Xilinx under the ISE, finally inserted UART on FPGA the IP nucleus to realize electric circuit's asynchronous serial communication function. Key word: IP nucleus; UART; Verilog HDL; FPGA ... -
With realizes - en.51rd.net based on the FPGA UART controller’s multi-module design
Thursday, October 30th, 2008 at 06:17 | No commentsCategories: EDA/PLDShort Content: The asynchronous serial communication request's transmission line are few, the reliability is high, the transmitting range is far, is widely applied in the microcomputer and the peripheral device data exchange. Realizes the serial port correspondence mainly to need to complete two parts of work: The serial port level switch into the equipment circuit wafer's operate level, namely realizes the RS-232 level and the TTL/CMOS level transformation; Receives and examines the serial data, turns the data parallel and ... -
Between MSP430 multi-processor’s mailing address and agreement
Tuesday, October 28th, 2008 at 05:23 | No commentsCategories: Communication NetworksShort Content: Abstract: The MSP430 function was already formidable, its internal peripheral device is rich, suits the numerous situation uses; But in the large-scale complex situation or the timely request high situation, uses processor processing all services, always appears some insufficiencies. The introduction multi-processor cooperation work's pattern, may enhance system's timeliness, the reliability and the serviceability; Using the MSP430 inherent characteristic, chooses the UART pattern, uses .ModBus the communication protocol, may carry on between the different processor's data exchange.Key word: Multi-processor UART ... -
The base only then HDLC between the agreement SDH transmission system board corresponds design
Monday, October 27th, 2008 at 22:43 | No commentsCategories: Communication NetworksShort Content: Abstract: Corresponds the tradition design method insufficiency in view of the SDH transmission system board, introduced that one kind uses the HDLC agreement to carry on the design the new method. And can realize on the MPC852T embedded microprocessor. The strict confirmation proved that it has obtained the very good performance in reliable and the transmission speed aspect.Key word: UART:HDLC:SDH: Embedded microprocessor; SCC 1 introduction Whether between the board corresponds the main line decides one of SDH system equipment stable ... -
Based on monolithic integrated circuit general pin software UART design
Monday, September 22nd, 2008 at 08:17 | No commentsCategories: SCMTags: data transmission, uartShort Content: Introduction Along with monolithic integrated circuit applied technology unceasingly thorough, constituted the multi-computer system by the monolithic integrated circuit to make the considerable progress, between many monolithic integrated circuits carried on the data transmission by the serial port, constituted the complex host from the type communications net. Has some monolithic integrated circuits in the multi-computer system to undertake the complex communication duty, when computer's serial port cannot meet the needs, must carry on the expansion to the serial port. ...
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